diff --git a/.gitignore b/.gitignore index cd531cf..9619ecc 100644 --- a/.gitignore +++ b/.gitignore @@ -52,3 +52,9 @@ Module.symvers Mkfile.old dkms.conf +.vscode/ +Listings/ +Objects/ +CreatBotAirHeating-V3.0-HC89S003AF4.uvgui.User +CreatBotAirHeating-V3.0-HC89S003AF4.hcf +STARTUP.A51 diff --git a/CreatBotAirHeating-V3.0-HC89S003AF4.uvopt b/CreatBotAirHeating-V3.0-HC89S003AF4.uvopt new file mode 100644 index 0000000..b8afa0a --- /dev/null +++ b/CreatBotAirHeating-V3.0-HC89S003AF4.uvopt @@ -0,0 +1,514 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Target 1 + 0x0 + MCS-51 + + 32000000 + + 1 + 1 + 1 + 0 + 0 + + + 0 + 65535 + 0 + 0 + 0 + + + 120 + 65 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 11 + + + + + + + + + + + Holychip\BIN\HC-LINK.dll + + + + 0 + HC-LINK + -S5 -B115200 -O15 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + + + 0 + + + + + Source Group + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\app\Main.c + Main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\app\Sys_init.c + Sys_init.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + .\app\Hc89s_Config.c + Hc89s_Config.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + .\app\IIC.c + IIC.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + .\app\TM1650.c + TM1650.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + .\app\Public.c + Public.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + .\app\PWM.c + PWM.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + .\app\ADC.c + ADC.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + .\app\UART1.c + UART1.c + 0 + 0 + + + 1 + 10 + 1 + 0 + 0 + 0 + .\app\Protocol.c + Protocol.c + 0 + 0 + + + 1 + 11 + 1 + 0 + 0 + 0 + .\app\Timer0.c + Timer0.c + 0 + 0 + + + 1 + 12 + 1 + 0 + 0 + 0 + .\app\Timer3.c + Timer3.c + 0 + 0 + + + 1 + 13 + 1 + 0 + 0 + 0 + .\app\IAP.c + IAP.c + 0 + 0 + + + 1 + 14 + 1 + 0 + 0 + 0 + .\app\PID.c + PID.c + 0 + 0 + + + + + Header Group + 0 + 0 + 0 + 0 + + 2 + 15 + 5 + 0 + 0 + 0 + .\app\Main.h + Main.h + 0 + 0 + + + 2 + 16 + 5 + 0 + 0 + 0 + .\app\Sys_init.h + Sys_init.h + 0 + 0 + + + 2 + 17 + 5 + 0 + 0 + 0 + .\app\Hc89s_Config.h + Hc89s_Config.h + 0 + 0 + + + 2 + 18 + 5 + 0 + 0 + 0 + .\app\TM1650.h + TM1650.h + 0 + 0 + + + 2 + 19 + 5 + 0 + 0 + 0 + .\app\IIC.h + IIC.h + 0 + 0 + + + 2 + 20 + 5 + 0 + 0 + 0 + .\app\Public.h + Public.h + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + .\app\PWM.h + PWM.h + 0 + 0 + + + 2 + 22 + 5 + 0 + 0 + 0 + .\app\ADC.h + ADC.h + 0 + 0 + + + 2 + 23 + 5 + 0 + 0 + 0 + .\app\UART.h + UART.h + 0 + 0 + + + 2 + 24 + 5 + 0 + 0 + 0 + .\app\Protocol.h + Protocol.h + 0 + 0 + + + 2 + 25 + 5 + 0 + 0 + 0 + .\app\Timer0.h + Timer0.h + 0 + 0 + + + 2 + 26 + 5 + 0 + 0 + 0 + .\app\Timer3.h + Timer3.h + 0 + 0 + + + 2 + 27 + 5 + 0 + 0 + 0 + .\app\IAP.h + IAP.h + 0 + 0 + + + 2 + 28 + 5 + 0 + 0 + 0 + .\app\PID.h + PID.h + 0 + 0 + + + + diff --git a/CreatBotAirHeating-V3.0-HC89S003AF4.uvproj b/CreatBotAirHeating-V3.0-HC89S003AF4.uvproj new file mode 100644 index 0000000..0019e76 --- /dev/null +++ b/CreatBotAirHeating-V3.0-HC89S003AF4.uvproj @@ -0,0 +1,517 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + Target 1 + 0x0 + MCS-51 + + + HC89S003AF4 + HC89S Series + IRAM(0-0xFF) XRAM(0-0x2FF) IROM(0-0x3FFF) CLOCK(32000000) + + "LIB\STARTUP.A51" ("Standard 8051 Startup Code") + + 0 + HC_DEFINE.H + + + + + + + + + + + 0 + 0 + + + + Holychip\ + Holychip\ + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + CreatBotAirHeating-V3.0-HC89S003AF4 + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 0 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + 65535 + + + S8051.DLL + + DP51.DLL + -p51 + S8051.DLL + + TP51.DLL + -p51 + + + + 0 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + + 0 + 11 + + + + + + + + + + + + + + Holychip\BIN\HC-LINK.dll + + + + + 1 + 0 + 0 + 0 + 1 + 4102 + + 0 + Holychip\BIN\HC-LINK.dll + + + + + + 0 + + + + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + 0 + 0x0 + 0xffff + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x4000 + + + 0 + 0x0 + 0x100 + + + 0 + 0x0 + 0x300 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + + + 0 + 0 + 1 + 0 + 1 + 3 + 8 + 2 + 1 + 1 + 0 + 0 + + + + + .\app + + + + 0 + 1 + 0 + 0 + + + + + + + + + 0 + 0 + 1 + 0 + 2 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Source Group + + + Main.c + 1 + .\app\Main.c + + + Sys_init.c + 1 + .\app\Sys_init.c + + + Hc89s_Config.c + 1 + .\app\Hc89s_Config.c + + + IIC.c + 1 + .\app\IIC.c + + + TM1650.c + 1 + .\app\TM1650.c + + + Public.c + 1 + .\app\Public.c + + + PWM.c + 1 + .\app\PWM.c + + + ADC.c + 1 + .\app\ADC.c + + + UART1.c + 1 + .\app\UART1.c + + + Protocol.c + 1 + .\app\Protocol.c + + + Timer0.c + 1 + .\app\Timer0.c + + + Timer3.c + 1 + .\app\Timer3.c + + + IAP.c + 1 + .\app\IAP.c + + + PID.c + 1 + .\app\PID.c + + + + + Header Group + + + Main.h + 5 + .\app\Main.h + + + Sys_init.h + 5 + .\app\Sys_init.h + + + Hc89s_Config.h + 5 + .\app\Hc89s_Config.h + + + TM1650.h + 5 + .\app\TM1650.h + + + IIC.h + 5 + .\app\IIC.h + + + Public.h + 5 + .\app\Public.h + + + PWM.h + 5 + .\app\PWM.h + + + ADC.h + 5 + .\app\ADC.h + + + UART.h + 5 + .\app\UART.h + + + Protocol.h + 5 + .\app\Protocol.h + + + Timer0.h + 5 + .\app\Timer0.h + + + Timer3.h + 5 + .\app\Timer3.h + + + IAP.h + 5 + .\app\IAP.h + + + PID.h + 5 + .\app\PID.h + + + + + + + + diff --git a/README.md b/README.md index b8c0911..a6ebaa5 100644 --- a/README.md +++ b/README.md @@ -1,3 +1,3 @@ # CreatBotAirHeatingV2 -PEEK300风嘴加热核心控制板V2(更换主控芯片) \ No newline at end of file +PEEK300风嘴加热核心控制板V2(更换主控芯片) 主控芯片HC89S003ASF4 \ No newline at end of file diff --git a/app/ADC.c b/app/ADC.c new file mode 100644 index 0000000..10bdc30 --- /dev/null +++ b/app/ADC.c @@ -0,0 +1,123 @@ +/* + * ADC.c + * + * Created on: 2022322 + * Author: User + */ + +#include + +uint16_t volatile Channel = 0; // ADCͨλ +uint16_t xdata Temp_Array[2][10] = {0}; //ͨ10λֵ + +uint8_t count = 0; //ת +uint16_t Display1_Array[5] = {0}; +uint16_t Display2_Array[5] = {0}; +static void ADC_Init(void); //ʼ +static void Get_ADCData(void); //ѶADֵת¶ +void Delay_2us(uint16_t fui_i); +ADC_t ADC = { + 0, + 0, + 0, + 0, + ADC_Init, // ADCʼ + Get_ADCData, //תֵ +}; +/* + * @name ADC_Init + * @brief ADCʼ + * @param None + * @retval None + */ +static void ADC_Init(void) +{ + // P0M1 = P0M1 & 0x0F | 0x30; + // ADCC0 = 0x81; //ADCԴ ѡڲ׼ѹVREF ѡڲ4V׼ѹ + ADCC0 = 0x84; //ADCԴ ѡⲿ׼ѹVREF + Delay_2us(10); // ʱ20΢ȴȶ + ADCC1 = 0x0D; //ⲿͨ3 + + ADCC2 = 0x6D; // ADCת12λ Ҷ 16Ƶ + IE1 |= 0x20; //ADCж + EA = 1; //ж + ADCC0 &= ~0x20; //תɱ־λ + Channel = Temp1_CHANNEL; + ADCC1 = (ADCC1 & (~0x07)) | Channel; //лͨͨ + ADCC0 |= 0x40; //ADCת +} +static void Get_ADCData(void) //תADֵ +{ + static uint16_t Temp1 = 0, Temp2 = 0; + static uint8_t count = 0; + Temp1 = Temp_Array[0][0] + Temp_Array[0][1] + Temp_Array[0][2] + Temp_Array[0][3] + Temp_Array[0][4] + Temp_Array[0][5] + Temp_Array[0][6] + Temp_Array[0][7] + Temp_Array[0][8] + Temp_Array[0][9]; + Temp1 = Temp1 / 10; //10ƽֵ + ADC.Temp1_Result = (Temp1 * 5 / 4.095 + 5) / 10; //תΪ¶ ڲ4V׼ѹ ɼΪѹѹһ + Temp1 = 0; + + Temp2 = Temp_Array[1][0] + Temp_Array[1][1] + Temp_Array[1][2] + Temp_Array[1][3] + Temp_Array[1][4] + Temp_Array[1][5] + Temp_Array[1][6] + Temp_Array[1][7] + Temp_Array[1][8] + Temp_Array[1][9]; + Temp2 = Temp2 / 10; //10ƽֵ + ADC.Temp2_Result = (Temp2 * 5 / 4.095 + 5) / 10; //תΪ¶ ڲ4V׼ѹ ɼΪѹѹһ + Temp2 = 0; + if (Timer0.ADC_Timer >= TIMER0_80mS) + { + Timer0.ADC_Timer = 0; + Display1_Array[count] = ADC.Temp1_Result; + Display2_Array[count] = ADC.Temp2_Result; + count++; + } + + if (count >= 5) + { + count = 0; + Temp1 = Display1_Array[0] + Display1_Array[1] + Display1_Array[2] + Display1_Array[3] + Display1_Array[4]; + ADC.Display_Temp1_Value = (float)Temp1 / 5 + 0.5; + Temp2 = Display2_Array[0] + Display2_Array[1] + Display2_Array[2] + Display2_Array[3] + Display2_Array[4]; + ADC.Display_Temp2_Value = (float)Temp2 / 5 + 0.5; + Temp1 = 0; + Temp2 = 0; + } +} + +/* + * @name ADC_Rpt + * @brief ADCжϺ + * @param None + * @retval None + */ +void ADC_Rpt() interrupt ADC_VECTOR +{ + ADCC0 &= ~0x20; //ADCжϱ־λ + if (Channel == Temp1_CHANNEL) //ͨ13 + { + + Temp_Array[0][count] = ADCR; + Channel = Temp2_CHANNEL; //лͨ + } + else if (Channel == Temp2_CHANNEL) //ͨ12 + { + Temp_Array[1][count] = ADCR; + Channel = Temp1_CHANNEL; //лͨ + count++; + } + + if (count >= 10) //ѭ10 + count = 0; + ADCC1 = (ADCC1 & (~0x07)) | Channel; //лͨͨ + Delay_2us(10); //лͨʱ20us + ADCC0 |= 0x40; //һת +} + +/* + * @name Delay_2us + * @brief ʱ2us + * @param fui_i + * @retval None + */ +void Delay_2us(uint16_t fui_i) +{ + while (fui_i--) + ; +} + +///////////////////////////////////////////////////////////////////////////////// diff --git a/app/ADC.h b/app/ADC.h new file mode 100644 index 0000000..9119e33 --- /dev/null +++ b/app/ADC.h @@ -0,0 +1,27 @@ +/* + * adc.h + * + * Created on: 2022322 + * Author: User + */ + +#ifndef _ADC_H_ +#define _ADC_H_ + +#define Temp1_CHANNEL 0x0D //ͨ13 +#define Temp2_CHANNEL 0x0C //ͨ12 + +typedef struct +{ + uint16_t volatile Temp1_Result; //¶1ת + uint16_t volatile Temp2_Result; //¶2adcת + uint16_t volatile Display_Temp1_Value; + uint16_t volatile Display_Temp2_Value; + void (*Init)(void); //ʼ + void (*Get_ADCData)(void); //תadֵ¶ +} ADC_t; + +extern ADC_t ADC; + + +#endif diff --git a/app/Hc89s_Config.c b/app/Hc89s_Config.c new file mode 100644 index 0000000..537b2bd --- /dev/null +++ b/app/Hc89s_Config.c @@ -0,0 +1,691 @@ + +#include "Hc89s_Config.h" + +/* +********************************************************************************************************* +* +********************************************************************************************************* +*/ +static void SystemClock_Init(void); + +#if GPIO_INIT_ENABLE +static void GPIO_Init(void); +#endif + +#if RESET_INIT_ENABLE +static void Reset_Init(void); +#endif + +#if WDT_INIT_ENABLE +static void WDT_Init(void); +#endif + +#if SYSTEM_EA_INIT_ENABLE +static void SystemEA_Init(void); +#endif +/* +********************************************************************************************************* +* : SystemClock_Init +* ˵: ϵͳʱ ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +static void SystemClock_Init(void) +{ +/*************************************** ڲƵ ************************************************/ + #if CLOCK_IN_HIGH_ENABLE + CLKSWR = CLOCK_IN_HIGH_CLKSWR_INIT; + CLKDIV = CLOCK_IN_HIGH_CLKDIV_INIT; +/*************************************** ڲƵ ************************************************/ + #elif CLOCK_IN_LOW_ENABLE + while((CLKCON&0x10)!=0x10); + CLKSWR &=~ 0x30; + while((CLKSWR&0xC0)!=0x00); + CLKCON &=~ 0x02; + CLKDIV = CLOCK_IN_LOW_CLKDIV_INIT; +/*************************************** ⲿƵ ************************************************/ + #elif CLOCK_OUT_HIGH_ENABLE + CLKCON |= 0x04; + XTALCFG |= 0x01+CLOCK_OUT_HIGH_HXTAL_MODE_SEL_INIT+CLOCK_OUT_HIGH_HXTAL_CFG_INIT; + while((CLKCON&0x80)!=0x80); + CLKSWR = 0xF0; + while((CLKSWR&0xC0)!=0xC0); + CLKCON &=~ 0x02; + CLKDIV = CLOCK_OUT_HIGH_CLKDIV_INIT; +/*************************************** ⲿƵ ************************************************/ + #elif CLOCK_OUT_LOW_ENABLE + CLKCON |= 0x04; + XTALCFG |= CLOCK_OUT_HIGH_LXTAL_CFG_INIT; + while((CLKCON&0x40)!=0x40); + CLKSWR = 0xF0; + while((CLKSWR&0x80)!=0x80); + CLKCON &=~ 0x02; + CLKDIV = CLOCK_OUT_HIGH_CLKDIV_INIT; + #endif + + #if CLOCK_OUTPUT_ENABLE + CLKOUT = CLOCK_CLK_OUT_SEL_INIT + 0x10; + CLKO_MAP = CLOCK_CLOCKMAP_INIT ; + #endif + + #if CLOCK_FREQ_CLK_ENABLE + FREQ_CLK = CLOCK_FREQ_CLK_INIT; + #endif + + #if CLOCK_RC_EN_PD_INIT + XTALCFG = CLOCK_RC_EN_PD_INIT; + #endif +} + +/* +********************************************************************************************************* +* : GPIO_Init +* ˵: ˿ ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if GPIO_INIT_ENABLE +static void GPIO_Init(void) +{ + P0M0=GPIO_MODE_P0M0; + P0M1=GPIO_MODE_P0M1; + P0M2=GPIO_MODE_P0M2; + P0M3=GPIO_MODE_P0M3; + + P1M0=GPIO_MODE_P1M0; + + P2M0=GPIO_MODE_P2M0; + P2M1=GPIO_MODE_P2M1; + P2M2=GPIO_MODE_P2M2; + P2M3=GPIO_MODE_P2M3; + + #if GPIO_INIT_PULLRES_ENABLE + P0LPU = GPIO_PULLRESVALUE_P02; + #endif + + #if GPIO_INIT_DBC_P00_ENABLE + P00DBC = GPIO_DBC_INIT_P00; + #endif + + #if GPIO_INIT_DBC_P01_ENABLE + P01DBC = GPIO_DBC_INIT_P01; + #endif + + #if GPIO_INIT_DBC_P02_ENABLE + P02DBC = GPIO_DBC_INIT_P02; + #endif +} + +#endif + +/* +********************************************************************************************************* +* : Reset_Init +* ˵: λ ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if RESET_INIT_ENABLE +static void Reset_Init(void) +{ + #if RESET_INIT_ENABLE + BORC = RESET_BORVS_INIT; + BORDBC = RESET_BORDBC_INIT; + #endif + + #if RESET_RSTDBC_INIT_ENABLE + RSTDBC = RESET_RSTDBC_INIT; + #endif + + #if RESET_SPOV_INIT_ENABLE + SPOV_RSTEN = RESET_SPOV_INIT; + #endif +} +#endif + +/* +********************************************************************************************************* +* : WDTInit +* ˵: Źʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if WDT_INIT_ENABLE +static void WDT_Init(void) +{ + WDTC=WDT_WDTC_INIT; + WDTCCR=WDT_WDTCCR_INIT; +} +#endif + +/* +********************************************************************************************************* +* : LVD_Init +* ˵: Źʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if LVD_INIT_ENABLE +static void LVD_Init(void) +{ + LVDC=LVD_LVDC_INIT; + #if LVD_LVDDBC_INIT_ENABLE + LVDDBC=LVD_LVDDBC_INIT; + #endif +} +#endif + +/* +********************************************************************************************************* +* : TIMER3_Init +* ˵: TIMER3ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if TIMER3_INIT_ENABLE +static void TIMER3_Init(void) +{ + #if TIMER3_T3MAP_ENABLE + T3_MAP = TIMER3_T3MAP_INIT; + #endif + T3CON = TIMER3_TCON_INIT; + TH3 = TIMER3_TH3_INIT; + TL3 = TIMER3_TL3_INIT; + +} +#endif + +/* +********************************************************************************************************* +* : TIMER4_Init +* ˵: ʱ4ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if TIMER4_INIT_ENABLE +static void TIMER4_Init(void) +{ + #if TIMER4_T4MAP_ENABLE + T4_MAP = TIMER4_T4MAP_INIT; + #endif + T4CON = TIMER4_TCON_INIT; + TH4 = TIMER4_TH4_INIT; + TL4 = TIMER4_TL4_INIT; +} +#endif + +/* +********************************************************************************************************* +* : TIMER5_Init +* ˵: ʱ5ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if TIMER5_INIT_ENABLE +static void TIMER5_Init(void) +{ + #if TIMER5_T5MAP_ENABLE + T5_MAP = TIMER5_T5MAP_INIT; + #endif + T5CON = TIMER5_TCON_INIT; + T5CON1 = TIMER5_TCON1_INIT; + TH5 = TIMER5_TH5_INIT; + TL5 = TIMER5_TL5_INIT; + +} +#endif +/* +********************************************************************************************************* +* : PWM0_Init +* ˵: PWM0ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if PWM0_INIT_ENABLE +static void PWM0_Init(void) +{ + + #if PWM0OUT_INIT_ENABLE + PWM0_MAP = PWM0_PWM0MAP_INIT; + #endif + #if PWM01OUT_INIT_ENABLE + PWM01_MAP = PWM0_PWM01MAP_INIT; + #endif + PWM0C = PWM0_PWM0C_INIT; + + PWM0PH = PWM0PH_INIT; + PWM0PL = PWM0PL_INIT; + + #if PWM0OUT_INIT_ENABLE + PWM0DH = PWM0DH_INIT; + PWM0DL = PWM0DL_INIT; + #endif + + #if PWM0_DTHL_ENABLE + PWM0DTH = PWM0DTH_INIT; + PWM0DTL = PWM0DTL_INIT; + #elif PWM01OUT_INIT_ENABLE + PWM0DTH = PWM01DH_INIT; + PWM0DTL = PWM01DL_INIT; + #endif + + PWM0EN = PWM0_PWM0EN_INIT; +} +#endif + +/* +********************************************************************************************************* +* : PWM1_Init +* ˵: PWM1ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if PWM1_INIT_ENABLE +static void PWM1_Init(void) +{ + + #if PWM1OUT_INIT_ENABLE + PWM1_MAP = PWM1_PWM1MAP_INIT; + #endif + #if PWM11OUT_INIT_ENABLE + PWM11_MAP = PWM1_PWM11MAP_INIT; + #endif + PWM1C = PWM1_PWM1C_INIT; + + PWM1PH = PWM1PH_INIT; + PWM1PL = PWM1PL_INIT; + + #if PWM1OUT_INIT_ENABLE + PWM1DH = PWM1DH_INIT; + PWM1DL = PWM1DL_INIT; + #endif + + #if PWM1_DTHL_ENABLE + PWM1DTH = PWM1DTH_INIT; + PWM1DTL = PWM1DTL_INIT; + #elif PWM11OUT_INIT_ENABLE + PWM1DTH = PWM11DH_INIT; + PWM1DTL = PWM11DL_INIT; + #endif + + PWM1EN = PWM1_PWM1EN_INIT; +} +#endif + +/* +********************************************************************************************************* +* : PWM2_Init +* ˵: PWM2ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if PWM2_INIT_ENABLE +static void PWM2_Init(void) +{ + + #if PWM2OUT_INIT_ENABLE + PWM2_MAP = PWM2_PWM2MAP_INIT; + #endif + + #if PWM21OUT_INIT_ENABLE + PWM21_MAP = PWM2_PWM21MAP_INIT; + #endif + + PWM2C = PWM2_PWM2C_INIT; + + PWM2PH = PWM2PH_INIT; + PWM2PL = PWM2PL_INIT; + + #if PWM2OUT_INIT_ENABLE + PWM2DH = PWM2DH_INIT; + PWM2DL = PWM2DL_INIT; + #endif + + #if PWM2_DTHL_ENABLE + PWM2DTH = PWM2DTH_INIT; + PWM2DTL = PWM2DTL_INIT; + #elif PWM21OUT_INIT_ENABLE + PWM2DTH = PWM21DH_INIT; + PWM2DTL = PWM21DL_INIT; + #endif + + PWM2EN = PWM2_PWM2EN_INIT; +} +#endif + + +/* +********************************************************************************************************* +* : PWM3_Init +* ˵: PWM3ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if PWM3_INIT_ENABLE +static void PWM3_Init(void) +{ + PWM3_MAP = PWM3_PWM3MAP_INIT; + PWM3C = PWM3_PWM3C_INIT; + PWM3P = PWM3P_INIT; + PWM3D = PWM3D_INIT; +} +#endif +/* +********************************************************************************************************* +* : ADC_Init +* ˵: ADCʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if ADC_INIT_ENABLE +static void ADC_Init(void) +{ + ADCC0= ADC_ADCC0_INIT ; + ADCC1= ADC_ADCC1_INIT ; + ADCC2= ADC_ADCC2_INIT ; + #if ADC_ADCWC_INIT + ADCWC= ADC_ADCWC_INIT ; + #endif +} +#endif + + + +/* +********************************************************************************************************* +* : UART1_Init +* ˵: ADCʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if UART1_INIT_ENABLE +static void UART1_Init(void) +{ + TXD_MAP = UART1_TXDMAP_INIT; + RXD_MAP = UART1_RXDMAP_INIT; + SCON = UART1_SCON_INIT; + #if UART1_MODEL0_ENABLE + + SCON2=UART1_MODEL0_SCON2_INIT ; + #elif UART1_MODEL1_ENABLE + + SCON2=UART1_MODEL1_SCON2_INIT ; + + #elif UART1_MODEL2_ENABLE + SCON2=UART1_MODEL2_SCON2_INIT ; + #if UART1_MODEL2_SM2_INIT + SADDR = UART1_MODEL2_SADDR_INIT; + SADEN = UART1_MODEL2_SADEN_INIT; + #endif + #elif UART1_MODEL3_ENABLE + SCON2=UART1_MODEL3_SCON2_INIT ; + #if UART1_MODEL3_SM2_INIT + SADDR = UART1_MODEL3_SADDR_INIT; + SADEN = UART1_MODEL3_SADEN_INIT; + #endif + #endif + + +} +#endif + +/* +********************************************************************************************************* +* : UART2_Init +* ˵: UART2ʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if UART2_INIT_ENABLE +static void UART2_Init(void) +{ + TXD2_MAP = UART2_TXD2MAP_INIT; + RXD2_MAP = UART2_RXD2MAP_INIT; + S2CON = UART2_REN_INIT; + S2CON2 = UART2_S2CON2_INIT; +} +#endif + +/* +********************************************************************************************************* +* : SPI_Init +* ˵: SPIʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if SPI_INIT_ENABLE +static void SPI_Init(void) +{ + SS_MAP = SPI_SSMAP_INIT; + SCK_MAP = SPI_SCKMAP_INIT; + MOSI_MAP = SPI_MOSIMAP_INIT; + MISO_MAP = SPI_MISOMAP_INIT; + + SPCTL = SPI_SPCTL_INIT; +} +#endif + +/* +********************************************************************************************************* +* : EXTI_Init +* ˵: ⲿж +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if EXIT_INIT_ENABLE +static void EXTI_Init(void) +{ +/**************************************** ⲿж0-1ܽ *****************************************/ + #if ( EXIT0_INIT_ENABLE || EXIT1_INIT_ENABLE ) + INT01_PINS = EXIT_INT01_PINS_INIT ; + #endif +/**************************************** ⲿж0-3ƽ *****************************************/ + #if ( EXIT0_INIT_ENABLE || EXIT1_INIT_ENABLE || EXIT2_INIT_ENABLE || EXIT3_INIT_ENABLE ) + PITS0 = EXIT_PITS0_INIT; + #endif +/**************************************** ⲿж4-7ƽ *****************************************/ + #if ( EXIT4_INIT_ENABLE || EXIT5_INIT_ENABLE || EXIT6_INIT_ENABLE || EXIT7_INIT_ENABLE ) + PITS1 = EXIT_PITS1_INIT; + #endif +/**************************************** ⲿж8-11ƽ *****************************************/ + #if ( EXIT8_INIT_ENABLE || EXIT9_INIT_ENABLE || EXIT10_INIT_ENABLE || EXIT11_INIT_ENABLE ) + PITS2 = EXIT_PITS2_INIT; + #endif +/**************************************** ⲿж12-15ƽ *****************************************/ + #if ( EXIT12_INIT_ENABLE || EXIT13_INIT_ENABLE || EXIT14_INIT_ENABLE || EXIT15_INIT_ENABLE ) + PITS3 = EXIT_PITS3_INIT; + #endif +/**************************************** ⲿж2-07ʹ *****************************************/ + #if ( EXIT2_INIT_ENABLE || EXIT3_INIT_ENABLE || EXIT4_INIT_ENABLE ||\ + EXIT5_INIT_ENABLE || EXIT6_INIT_ENABLE || EXIT7_INIT_ENABLE) + PINTE0 = EXIT_PINTE0_INIT; + #endif +/**************************************** ⲿж12-15ʹ *****************************************/ + #if ( EXIT8_INIT_ENABLE || EXIT9_INIT_ENABLE || EXIT10_INIT_ENABLE || EXIT11_INIT_ENABLE ||\ + EXIT12_INIT_ENABLE || EXIT13_INIT_ENABLE || EXIT14_INIT_ENABLE || EXIT15_INIT_ENABLE ) + PINTE1 = EXIT_PINTE1_INIT; + #endif +} +#endif + +/* +********************************************************************************************************* +* : TIMER0Init +* ˵: Źʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if ( TIMER0_INIT_ENABLE || TIMER1_INIT_ENABLE ) +static void TIMER01_Init(void) +{ +#if (TIMER0_T0OUT_INIT || TIMER0_CT0_INIT) + T0_MAP==TIMER0_T0MAP_INIT; +#endif + +#if (TIMER1_T1OUT_INIT || TIMER1_CT1_INIT) + T1_MAP==TIMER1_T1MAP_INIT; +#endif + + TMOD=TIMER01_TMOD_INIT; + TCON1=TIMER01_TCON1_INIT; + TCON=TIMER01_TCON_INIT; +#if TIMER0_INIT_ENABLE + TH0=TIMER0_TH0_INIT; + TL0=TIMER0_TL0_INIT; +#endif +#if TIMER1_INIT_ENABLE + TH1=TIMER1_TH1_INIT; + TL1=TIMER1_TL1_INIT; +#endif + +} +#endif + + +/* +********************************************************************************************************* +* : INT_Init +* ˵: ж +* Σ +* ֵ: +********************************************************************************************************* +*/ +#if (EXIT_INIT_ENABLE || WDT_INT_ENABLE || TIMER0_INIT_ENABLE || TIMER1_INIT_ENABLE \ + || TIMER3_INIT_ENABLE || TIMER4_INIT_ENABLE || TIMER5_INIT_ENABLE || PWM_INIT_ENABLE || ADC_INT_ENABLE) +static void INT_Init(void) +{ +/**************************************** IEʹ *****************************************/ +#if (WDT_INT_ENABLE || EXIT0_INIT_ENABLE || EXIT1_INIT_ENABLE || TIMER0_INIT_ENABLE || TIMER1_INIT_ENABLE \ + || UART1_INT_ENABLE || UART2_INT_ENABLE) + IE=INT_IE_INIT; +#endif +/**************************************** IE1ʹ *****************************************/ +#if (EXIT2_7_INIT_ENABLE || EXIT8_15_INIT_ENABLE || TIMER3_INIT_ENABLE \ + || TIMER4_INIT_ENABLE || TIMER5_INIT_ENABLE || ADC_INT_ENABLE || SPI_INT_ENABLE) + IE1=INT_IE1_INIT; +#endif +/**************************************** IP0(ȼ) *****************************************/ +#if (EXIT0_INIT_ENABLE || EXIT1_INIT_ENABLE || TIMER0_INIT_ENABLE || TIMER1_INIT_ENABLE) + IP0=INT_IP0_INIT; +#endif +/**************************************** IP1(ȼ) *****************************************/ +#if (WDT_INT_ENABLE || UART1_INT_ENABLE || UART2_INT_ENABLE || LVD_LVDIE_INIT) + IP1=INT_IP1_INIT; +#endif +/**************************************** IP2(ȼ) *****************************************/ +#if (TIMER3_INIT_ENABLE || TIMER4_INIT_ENABLE || PWM_INIT_ENABLE || SPI_INT_ENABLE) + IP2=INT_IP2_INIT; +#endif +/**************************************** IP3(ȼ) *****************************************/ +#if (EXIT8_15_INIT_ENABLE || EXIT2_7_INIT_ENABLE || TIMER5_INIT_ENABLE || ADC_INT_ENABLE) + IP3=INT_IP3_INIT; +#endif +/**************************************** ж *****************************************/ +#if (SYSTEM_EA_INIT_ENABLE) + EA=SYSTEM_EA_INIT; +#endif +} +#endif + + +/* +********************************************************************************************************* +* : System_Init +* ˵: ϵͳʼ +* Σ +* ֵ: +********************************************************************************************************* +*/ +void System_Init(void) +{ + SystemClock_Init(); +#if GPIO_INIT_ENABLE + GPIO_Init(); +#endif + +#if RESET_INIT_ENABLE + Reset_Init(); +#endif + +#if WDT_INIT_ENABLE + WDT_Init(); +#endif + +#if EXIT_INIT_ENABLE + EXTI_Init(); +#endif + +#if ( TIMER0_INIT_ENABLE || TIMER1_INIT_ENABLE ) + TIMER01_Init(); +#endif + +#if TIMER3_INIT_ENABLE + TIMER3_Init(); +#endif + +#if TIMER4_INIT_ENABLE + TIMER4_Init(); +#endif + +#if TIMER5_INIT_ENABLE + TIMER5_Init(); +#endif + +#if PWM0_INIT_ENABLE + PWM0_Init(); +#endif + +#if PWM1_INIT_ENABLE + PWM1_Init(); +#endif + +#if PWM2_INIT_ENABLE + PWM2_Init(); +#endif + +#if PWM3_INIT_ENABLE + PWM3_Init(); +#endif + +#if ADC_INIT_ENABLE + ADC_Init(); +#endif + +#if UART1_INIT_ENABLE + UART1_Init(); +#endif + +#if UART2_INIT_ENABLE + UART2_Init(); +#endif + +#if SPI_INIT_ENABLE + SPI_Init(); + +#endif + +#if (EXIT_INIT_ENABLE || WDT_INIT_ENABLE || TIMER0_INIT_ENABLE || TIMER1_INIT_ENABLE \ + || TIMER3_INIT_ENABLE || TIMER4_INIT_ENABLE || TIMER5_INIT_ENABLE || PWM_INIT_ENABLE || ADC_INT_ENABLE \ + || UART1_INT_ENABLE || UART1_INT_ENABLE || SPI_INT_ENABLE) + INT_Init(); +#endif + +} diff --git a/app/Hc89s_Config.h b/app/Hc89s_Config.h new file mode 100644 index 0000000..5ec157a --- /dev/null +++ b/app/Hc89s_Config.h @@ -0,0 +1,2952 @@ + #ifndef HC89S_CONFIG_H_ +#define HC89S_CONFIG_H_ + + +#include "HC89S003AF4.h" + + +//<<< Use Configuration Wizard in Context Menu >>> + +/* +********************************************************************************************************* +* ʱ +********************************************************************************************************* +*/ +/*************************************** ϵͳʱ ************************************************/ +// ϵͳʱ + +// BOR λʱ +// <0=> رոƵڲ RC +// <1=> رոƵڲ RC +#define CLOCK_RC_EN_PD_INIT 2 + + +// ڲƵRCʹ +// ϵͳʱԴΪڲƵ RC 32MHZ +#define CLOCK_IN_HIGH_ENABLE 1 +// OSCʱƵ +// OSCʱΪڲƵRCƵ +// <0x50=> 32 MHZ +// <0x51=> 16 MHZ +// <0x52=> 08 MHZ +// <0x53=> 04 MHZ +#define CLOCK_IN_HIGH_CLKSWR_INIT 0x51 +// CPUʱӣOSCʱӷƵȣ <1-255> +// CPUʱΪOSCʱӷƵ +#define CLOCK_IN_HIGH_CLKDIV_INIT 1 +// + +// ڲƵRCʹ +// ϵͳʱԴΪڲƵ RC 44KHZ +#define CLOCK_IN_LOW_ENABLE 0 +// CPUʱӣOSCʱӷƵȣ <1-255> +// CPUʱΪOSCʱӷƵ +#define CLOCK_IN_LOW_CLKDIV_INIT 0 +// + +// ⲿƵʹ +// ϵͳʱԴΪⲿƵ +#define CLOCK_OUT_HIGH_ENABLE 0 +// ⲿƵѡź +// ⲿƵƵ +// <0=> 4M/8M +// <1=> 4M/8M +// <3=> ѡ 16M/20M +#define CLOCK_OUT_HIGH_HXTAL_MODE_SEL_INIT 0 +// warmup ֵ +// ⲿƵ warmup ֵѡ񣬼ʱԴΪѡⲿƵ +// <0=> 2048 +// <1=> 256 +// <2=> 16384 +// <3=> 65536 +#define CLOCK_OUT_HIGH_HXTAL_CFG_INIT 0 +// + +// ⲿƵʹ +// ϵͳʱԴΪⲿƵ +#define CLOCK_OUT_LOW_ENABLE 0 +// warmup ֵ +// ⲿƵ warmup ֵѡ񣬼ʱԴΪѡⲿƵ +// <0=> 16384 +// <1=> 4096 +// <2=> 1024 +// <3=> 65536 +#define CLOCK_OUT_HIGH_LXTAL_CFG_INIT 0 +// + +// CPUʱƵ +// ڽ FLASH IAP дϵͳģʽ֮ǰָĿǰ CPU ʱӵƵ +#define CLOCK_FREQ_CLK_ENABLE 0 +// Ƶ +// <16=> 16MHz +// <8=> 08MHz +// <4=> 04MHz +// <2=> 02MHz +// <1=> Сڵ 1MHz +#define CLOCK_FREQ_CLK_INIT 16 +// + +// ʱ +// ʹ/ʧʱ +#define CLOCK_OUTPUT_ENABLE 0 +// ʱѡ +// <0=> CPUʱ +// <1=> OSCʱ +// <2=> WDTʱ +// <3=> ⲿʱ +// <4=> ڲƵ RC32M +// <5=> ڲƵ RC32M 2Ƶ +// <6=> ڲƵ RC32M 4Ƶ +// <7=> ڲƵ RC32M 8Ƶ +#define CLOCK_CLK_OUT_SEL_INIT 0 +// ʱӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define CLOCK_CLOCKMAP_INIT 0 +// +// + +/* +********************************************************************************************************* +* ϵͳж +********************************************************************************************************* +*/ +// ϵͳж +#define SYSTEM_EA_INIT_ENABLE 1 +// жϿ +// <0=> ر +// <1=> +#define SYSTEM_EA_INIT 1 +// + +/* +********************************************************************************************************* +* GPIO +********************************************************************************************************* +*/ +// GPIO +// оƬ˿ڳʼ +#define GPIO_INIT_ENABLE 1 + +// P0 ˿ģʽ +// P00 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P01 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P0M0 163 + +// P02 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P03 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P0M1 56 + +// P04 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P05 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P0M2 131 + +// P06 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P07 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P0M3 51 +// + +// P1 ˿ģʽ +// P10 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P11 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P1M0 63 + +// + +// P2 ˿ģʽ +// P20 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P21 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P2M0 130 + +// P22 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P23 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P2M1 136 + +// P24 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P25 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P2M2 51 + +// P26 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © + +// P27 +// <3=> Not Used +// <0=> 루ʩأ +// <1=> 루ʩأ +// <2=> 루ʩأ +// <3=> ģ +// <4=> 루ʩأ +// <5=> 루ʩأ +// <6=> 루ʩأ +// <8=> +// <9=> © +// <10=> © +#define GPIO_MODE_P2M3 168 +// + +// P02 ˿ +// P02 ˿ +#define GPIO_INIT_PULLRES_ENABLE 0 +// ֵ +// <0=> 50 K +// <16=> 100 K +// <32=> 150K +// <48=> 300 K +#define GPIO_PULLRESVALUE_P02 0 +// + +// P00 ˿ +// P00 ˿ +#define GPIO_INIT_DBC_P00_ENABLE 0 +// ˿ʱ +// <0=> Fosc /1 +// <1=> Fosc /4 +// <2=> Fosc /16 +// <3=> Fosc /64 +// ʱӸ <0-63> +#define GPIO_DBC_INIT_P00 0 +// + +// P01 ˿ +// P01 ˿ +#define GPIO_INIT_DBC_P01_ENABLE 0 +// ˿ʱ +// <0=> Fosc /1 +// <1=> Fosc /4 +// <2=> Fosc /16 +// <3=> Fosc /64 +// ʱӸ <0-63> +#define GPIO_DBC_INIT_P01 0 +// + +// P02 ˿ +// P02 ˿ +#define GPIO_INIT_DBC_P02_ENABLE 0 +// ˿ʱ +// <0=> Fosc /1 +// <1=> Fosc /4 +// <2=> Fosc /16 +// <3=> Fosc /64 +// ʱӸ <0-63> +#define GPIO_DBC_INIT_P02 127 +// +// + +/* +********************************************************************************************************* +* λ +********************************************************************************************************* +*/ +// λ +// öַʽλ +#define RESET_INIT_ENABLE 0 + +// BOR +#define RESET_BORVS_INIT_ENABLE 0 +// BOR ѹ +// <0=> 1.8 V +// <1=> 2.0 V +// <2=> 2.4 V +// <3=> 2.6 V +// <4=> 3.0 V +// <5=> 3.6 V +// <6=> 3.9 V +// <7=> 4.2 V + +// BOR ״̬ +// <0=> ر +// <1=> + +// BOR +// <0=> ر +// <1=> +#define RESET_BORVS_INIT 129 +// ʱӸ <0-255> +// 뷶Χ0~255 +// ʱ = BORDBC[7:0] * 8T CPU +2 T CPU +// ע⣺Ҫʹ BOR_DBC_EN BOR +#define RESET_BORDBC_INIT 255 +// + +// ⲿ RST ȥ +#define RESET_RSTDBC_INIT_ENABLE 0 +// ʱӸ <0-65535> +// 뷶Χ0~65535 +// ʱ = RSTDBC[7:0] * 8T CPU +2 T CPU +#define RESET_RSTDBC_INIT 255 +// + +// ջλ +#define RESET_SPOV_INIT_ENABLE 0 +// ջλ +// <0=> ر +// <1=> +#define RESET_SPOV_INIT 0 +// +// + + +/* +********************************************************************************************************* +* ͵ѹLVD +********************************************************************************************************* +*/ +// ͵ѹLVD +#define LVD_INIT_ENABLE 0 +// LVD ʹ +// LVD P0.2˿ڵѹ +// LVD ѹ +// <0=> 1.9 V +// <1=> 2.0 V +// <2=> 2.4 V +// <3=> 2.6 V +// <4=> 3.0 V +// <5=> 3.6 V +// <6=> 3.9 V +// <7=> 4.2 V +#define LVD_LVDCC_INIT 0 + +// LVD ж +#define LVD_LVDIE_INIT 0 +// жȼ +// ⲿж0 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define LVD_IP1_INIT 0 +// +#define LVD_LVDC_INIT LVD_LVDIE_INIT+LVD_LVDIE_INIT + +// ⲿ RST ȥ +#define LVD_LVDDBC_INIT_ENABLE 0 +// ʱӸ <0-65535> +// 뷶Χ0~65535 +// ʱ = RSTDBC[7:0] * 8T CPU +2 T CPU +#define LVD_LVDDBC_INIT 255 +// +// +/* +********************************************************************************************************* +* Ź +********************************************************************************************************* +*/ +// Ź +#define WDT_INIT_ENABLE 0 +/**************************************** ʹWDT *************************************/ +#if WDT_INIT_ENABLE +/**************************************** ʹWDTж *************************************/ +// Źж +#define WDT_INT_ENABLE 0 +#if WDT_INT_ENABLE +// жϿ +// <0=> ر +// <1=> +#define WDT_EWT_INIT 0 +// жȼ +// ⲿж0 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define WDT_IP1_INIT 0 +// +/**************************************** ʧWDTж *************************************/ +#else +#define WDT_IP1_INIT 0 +#define WDT_EWT_INIT 0 +#endif + +// Źλ +// <0=> ر +// <1=> + +// Ź͹ģʽ +// <0=> ر +// <1=> + +// ŹʱʱԴƵ +// <0=> ڲƵ RC44K8 Ƶ +// <1=> ڲƵ RC44K16 Ƶ +// <2=> ڲƵ RC44K32 Ƶ +// <3=> ڲƵ RC44K64 Ƶ +// <4=> ڲƵ RC44K128 Ƶ +// <5=> ڲƵ RC44K256 Ƶ +// <6=> ڲƵ RC44K512 Ƶ +// <7=> ڲƵ RC44K1024 Ƶ +#define WDT_WDTC_INIT 17 + +// Źʱ<0-255> +// ע⣺ +// ʹ WDT еģʽʱע⣬幷ͽָ֮ڵ 3 +// wdt_clkԼ 70us +// 44KHz Ϊм㣬ʵڲƵ RC Ƶʿͨʱ 5 вõ +// ʱ =( WDTƵϵ * (WDTCCR[7:0]+1))/ʵڲƵRCƵʡ +#define WDT_WDTCCR_INIT 255 +// +/**************************************** ʧWDT *************************************/ +#else +#define WDT_INT_ENABLE 0 +#define WDT_IP1_INIT 0 +#define WDT_WDTC_INIT 0x4F +#define WDT_EWT_INIT 0 +#define WDT_WDTCCR_INIT 0x00 +#endif + +/* +********************************************************************************************************* +* ⲿж +********************************************************************************************************* +*/ +// ⲿж +// ⲿж +#define EXIT_INIT_ENABLE 0 +#if EXIT_INIT_ENABLE +/**************************************** ⲿж0 *****************************************/ +// ⲿж0 +// ⲿж 0 +#define EXIT0_INIT_ENABLE 0 +/**************************************** ʹⲿж0 *************************************/ +#if EXIT0_INIT_ENABLE +// ܽѡ +// ⲿж0 ܽѡλ +// <0=> P00 +// <1=> P10 +#define EXIT0_INT0_PINS_INIT 0 +// жϴ +// ⲿж0 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT0_IT0_INIT 0 +// жȼ +// ⲿж0 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define EXIT0_IP0_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT0_EX0_INIT 0 +/**************************************** ʧⲿж0 *************************************/ +#else +#define EXIT0_INT0_PINS_INIT 0 +#define EXIT0_IT0_INIT 0 +#define EXIT0_EX0_INIT 0 +#define EXIT0_IP0_INIT 0 +#endif +// +/**************************************** ⲿж1 *****************************************/ +// ⲿж1 +// ⲿж 1 +#define EXIT1_INIT_ENABLE 0 +/**************************************** ʹⲿж1 *************************************/ +#if EXIT1_INIT_ENABLE +// ܽѡ +// ⲿж1 ܽѡλ +// <0=> P01 +// <1=> P11 +#define EXIT1_INT1_PINS_INIT 2 +// жϴ +// ⲿж1 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT1_IT1_INIT 4 +// жȼ +// ⲿж1 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define EXIT1_IP0_INIT 48 +// жϿ +// <0=> ر +// <1=> +#define EXIT1_EX1_INIT 4 +/**************************************** ʧⲿж1 *************************************/ +#else +#define EXIT1_INT1_PINS_INIT 0 +#define EXIT1_IT1_INIT 0 +#define EXIT1_EX1_INIT 0 +#define EXIT1_IP0_INIT 0 +#endif +// + + +/**************************************** ⲿж2-7 *****************************************/ +// ⲿж2-7 +// ⲿж 2-7 +#define EXIT2_7_INIT_ENABLE 0 +/**************************************** ʹⲿж2-7 *************************************/ +#if EXIT2_7_INIT_ENABLE +/**************************************** ⲿж2 *****************************************/ +// ⲿж2 +// ⲿж 2 +#define EXIT2_INIT_ENABLE 1 +/**************************************** ʹⲿж2 *************************************/ +#if EXIT2_INIT_ENABLE +// жϴ +// ⲿж2 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT2_IT2_INIT 16 +// жϿ +// <0=> ر +// <1=> +#define EXIT2_EINT2_INIT 4 +/**************************************** ʧⲿж2 *************************************/ +#else +#define EXIT2_IT2_INIT 0 +#define EXIT2_EINT2_INIT 0 +#endif +// +/**************************************** ⲿж3 *****************************************/ +// ⲿж3 +// ⲿж 3 +#define EXIT3_INIT_ENABLE 0 +/**************************************** ʹⲿж3 *************************************/ +#if EXIT3_INIT_ENABLE +// жϴ +// ⲿж3 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT3_IT3_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT3_EINT3_INIT 0 +/**************************************** ʧⲿж3 *************************************/ +#else +#define EXIT3_IT3_INIT 0 +#define EXIT3_EINT3_INIT 0 +#endif +// +/**************************************** ⲿж4 *****************************************/ +// ⲿж4 +// ⲿж 4 +#define EXIT4_INIT_ENABLE 0 +/**************************************** ʹⲿж4 *************************************/ +#if EXIT4_INIT_ENABLE +// жϴ +// ⲿж4 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT4_IT4_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT4_EINT4_INIT 0 +/**************************************** ʧⲿж4 *************************************/ +#else +#define EXIT4_IT4_INIT 0 +#define EXIT4_EINT4_INIT 0 +#endif +// +/**************************************** ⲿж5 *****************************************/ +// ⲿж5 +// ⲿж 5 +#define EXIT5_INIT_ENABLE 0 +/**************************************** ʹⲿж5 *************************************/ +#if EXIT5_INIT_ENABLE +// жϴ +// ⲿж5 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT5_IT5_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT5_EINT5_INIT 0 +/**************************************** ʧⲿж5 *************************************/ +#else +#define EXIT5_IT5_INIT 0 +#define EXIT5_EINT5_INIT 0 +#endif +// +/**************************************** ⲿж6 *****************************************/ +// ⲿж6 +// ⲿж 6 +#define EXIT6_INIT_ENABLE 0 +/**************************************** ʹⲿж6 *************************************/ +#if EXIT6_INIT_ENABLE +// жϴ +// ⲿж6 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT6_IT6_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT6_EINT6_INIT 0 +/**************************************** ʧⲿж6 *************************************/ +#else +#define EXIT6_IT6_INIT 0 +#define EXIT6_EINT6_INIT 0 +#endif +// +/**************************************** ⲿж7 *****************************************/ +// ⲿж7 +// ⲿж 7 +#define EXIT7_INIT_ENABLE 0 +/**************************************** ʹⲿж7 *************************************/ +#if EXIT7_INIT_ENABLE +// жϴ +// ⲿж7 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT7_IT7_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT7_EINT7_INIT 0 +/**************************************** ʧⲿж7 *************************************/ +#else +#define EXIT7_IT7_INIT 0 +#define EXIT7_EINT7_INIT 0 +#endif +// +/**************************************** ⲿж2-7ȼ *************************************/ +// жȼ +// ⲿж1 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define EXIT2_7_IP3_INIT 0 +/**************************************** ⲿжʹ *************************************/ +// жϿ +// <0=> ر +// <1=> +#define EXIT2_7_EX2_7_INIT 64 +/**************************************** ʧⲿж2-7 *************************************/ +#else +#define EXIT2_INIT_ENABLE 0 +#define EXIT3_INIT_ENABLE 0 +#define EXIT4_INIT_ENABLE 0 +#define EXIT5_INIT_ENABLE 0 +#define EXIT6_INIT_ENABLE 0 +#define EXIT7_INIT_ENABLE 0 +#define EXIT2_IT2_INIT 0 +#define EXIT2_EINT2_INIT 0 +#define EXIT3_IT3_INIT 0 +#define EXIT3_EINT3_INIT 0 +#define EXIT4_IT4_INIT 0 +#define EXIT4_EINT4_INIT 0 +#define EXIT5_IT5_INIT 0 +#define EXIT5_EINT5_INIT 0 +#define EXIT6_IT6_INIT 0 +#define EXIT6_EINT6_INIT 0 +#define EXIT7_IT7_INIT 0 +#define EXIT7_EINT7_INIT 0 +#define EXIT2_7_EX2_7_INIT 0 +#define EXIT2_7_IP3_INIT 0 +#endif +// + +/**************************************** ⲿж8-15 *****************************************/ +// ⲿж8-15 +// ⲿж 8-15 +#define EXIT8_15_INIT_ENABLE 0 +/**************************************** ʹⲿж8-15 *************************************/ +#if EXIT8_15_INIT_ENABLE +/**************************************** ⲿж8 *****************************************/ +// ⲿж8 +// ⲿж 8 +#define EXIT8_INIT_ENABLE 0 +/**************************************** ʹⲿж8 *************************************/ +#if EXIT8_INIT_ENABLE +// жϴ +// ⲿж8 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT8_IT8_INIT 2 +// жϿ +// <0=> ر +// <1=> +#define EXIT8_EINT8_INIT 0 +/**************************************** ʧⲿж8 *************************************/ +#else +#define EXIT8_IT8_INIT 0 +#define EXIT8_EINT8_INIT 0 +#endif +// +/**************************************** ⲿж9 *****************************************/ +// ⲿж9 +// ⲿж 9 +#define EXIT9_INIT_ENABLE 0 +/**************************************** ʹⲿж9 *************************************/ +#if EXIT9_INIT_ENABLE +// жϴ +// ⲿж9 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT9_IT9_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT9_EINT9_INIT 0 +/**************************************** ʧⲿж9 *************************************/ +#else +#define EXIT9_IT9_INIT 0 +#define EXIT9_EINT9_INIT 0 +#endif +// +/**************************************** ⲿж10 *****************************************/ +// ⲿж10 +// ⲿж 10 +#define EXIT10_INIT_ENABLE 0 +/**************************************** ʹⲿж10 *************************************/ +#if EXIT10_INIT_ENABLE +// жϴ +// ⲿж10 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT10_IT10_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT10_EINT10_INIT 0 +/**************************************** ʧⲿж10 *************************************/ +#else +#define EXIT10_IT10_INIT 0 +#define EXIT10_EINT10_INIT 0 +#endif +// +/**************************************** ⲿж11 *****************************************/ +// ⲿж11 +// ⲿж 11 +#define EXIT11_INIT_ENABLE 0 +/**************************************** ʹⲿж11 *************************************/ +#if EXIT11_INIT_ENABLE +// жϴ +// ⲿж11 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT11_IT11_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT11_EINT11_INIT 0 +/**************************************** ʧⲿж11 *************************************/ +#else +#define EXIT11_IT11_INIT 0 +#define EXIT11_EINT11_INIT 0 +#endif +// +/**************************************** ⲿж12 *****************************************/ +// ⲿж12 +// ⲿж 12 +#define EXIT12_INIT_ENABLE 0 +/**************************************** ʹⲿж12 *************************************/ +#if EXIT12_INIT_ENABLE +// жϴ +// ⲿж12 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT12_IT12_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT12_EINT12_INIT 0 +/**************************************** ʧⲿж12 *************************************/ +#else +#define EXIT12_IT12_INIT 0 +#define EXIT12_EINT12_INIT 0 +#endif +// +/**************************************** ⲿж13 *****************************************/ +// ⲿж13 +// ⲿж 13 +#define EXIT13_INIT_ENABLE 0 +/**************************************** ʹⲿж13 *************************************/ +#if EXIT13_INIT_ENABLE +// жϴ +// ⲿж13 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT13_IT13_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT13_EINT13_INIT 0 +/**************************************** ʧⲿж13 *************************************/ +#else +#define EXIT13_IT13_INIT 0 +#define EXIT13_EINT13_INIT 0 +#endif +// +/**************************************** ⲿж14 *****************************************/ +// ⲿж14 +// ⲿж 14 +#define EXIT14_INIT_ENABLE 0 +/**************************************** ʹⲿж14 *************************************/ +#if EXIT14_INIT_ENABLE +// жϴ +// ⲿж14 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT14_IT14_INIT 0 +// жϿ +// <0=> ر +// <1=> +#define EXIT14_EINT14_INIT 0 +/**************************************** ʧⲿж14 *************************************/ +#else +#define EXIT14_IT14_INIT 0 +#define EXIT14_EINT14_INIT 0 +#endif +// +/**************************************** ⲿж15 *****************************************/ +// ⲿж15 +// ⲿж 15 +#define EXIT15_INIT_ENABLE 0 +/**************************************** ʹⲿж15 *************************************/ +#if EXIT15_INIT_ENABLE +// жϴ +// ⲿж15 ѡλ +// <0=> ͵ƽж +// <1=> ½ж +// <2=> ж +// <3=> ˫ж +#define EXIT15_IT15_INIT 64 +// жϿ +// <0=> ر +// <1=> +#define EXIT15_EINT15_INIT 128 +/**************************************** ʧⲿж15 *************************************/ +#else +#define EXIT15_IT15_INIT 0 +#define EXIT15_EINT15_INIT 0 +#endif +// + +/**************************************** ⲿж8-15ȼ *************************************/ +// жȼ +// ⲿж1 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define EXIT8_15_IP3_INIT 192 +/**************************************** ⲿжʹ *************************************/ +// жϿ +// <0=> ر +// <1=> +#define EXIT8_15_EX8_15_INIT 0 +/**************************************** ʧⲿж8-15 *************************************/ +#else +#define EXIT8_INIT_ENABLE 0 +#define EXIT9_INIT_ENABLE 0 +#define EXIT10_INIT_ENABLE 0 +#define EXIT11_INIT_ENABLE 0 +#define EXIT12_INIT_ENABLE 0 +#define EXIT13_INIT_ENABLE 0 +#define EXIT14_INIT_ENABLE 0 +#define EXIT15_INIT_ENABLE 0 +#define EXIT8_IT8_INIT 0 +#define EXIT8_EINT8_INIT 0 +#define EXIT9_IT9_INIT 0 +#define EXIT9_EINT9_INIT 0 +#define EXIT10_IT10_INIT 0 +#define EXIT10_EINT10_INIT 0 +#define EXIT11_IT11_INIT 0 +#define EXIT11_EINT11_INIT 0 +#define EXIT12_IT12_INIT 0 +#define EXIT12_EINT12_INIT 0 +#define EXIT13_IT13_INIT 0 +#define EXIT13_EINT13_INIT 0 +#define EXIT14_IT14_INIT 0 +#define EXIT14_EINT14_INIT 0 +#define EXIT15_IT15_INIT 0 +#define EXIT15_EINT15_INIT 0 +#define EXIT8_15_IP3_INIT 0 +#define EXIT8_15_EX8_15_INIT 0 +#endif +// +#else +#define EXIT0_INIT_ENABLE 0 +#define EXIT0_INT0_PINS_INIT 0 +#define EXIT0_IT0_INIT 0 +#define EXIT0_EX0_INIT 0 +#define EXIT0_IP0_INIT 0 +#define EXIT1_INIT_ENABLE 0 +#define EXIT1_INT1_PINS_INIT 0 +#define EXIT1_IT1_INIT 0 +#define EXIT1_EX1_INIT 0 +#define EXIT1_IP0_INIT 0 +#define EXIT2_7_INIT_ENABLE 0 +#define EXIT2_INIT_ENABLE 0 +#define EXIT3_INIT_ENABLE 0 +#define EXIT4_INIT_ENABLE 0 +#define EXIT5_INIT_ENABLE 0 +#define EXIT6_INIT_ENABLE 0 +#define EXIT7_INIT_ENABLE 0 +#define EXIT2_IT2_INIT 0 +#define EXIT2_EINT2_INIT 0 +#define EXIT3_IT3_INIT 0 +#define EXIT3_EINT3_INIT 0 +#define EXIT4_IT4_INIT 0 +#define EXIT4_EINT4_INIT 0 +#define EXIT5_IT5_INIT 0 +#define EXIT5_EINT5_INIT 0 +#define EXIT6_IT6_INIT 0 +#define EXIT6_EINT6_INIT 0 +#define EXIT7_IT7_INIT 0 +#define EXIT7_EINT7_INIT 0 +#define EXIT2_7_EX2_7_INIT 0 +#define EXIT2_7_IP3_INIT 0 +#define EXIT8_15_INIT_ENABLE 0 +#define EXIT8_INIT_ENABLE 0 +#define EXIT9_INIT_ENABLE 0 +#define EXIT10_INIT_ENABLE 0 +#define EXIT11_INIT_ENABLE 0 +#define EXIT12_INIT_ENABLE 0 +#define EXIT13_INIT_ENABLE 0 +#define EXIT14_INIT_ENABLE 0 +#define EXIT15_INIT_ENABLE 0 +#define EXIT8_IT8_INIT 0 +#define EXIT8_EINT8_INIT 0 +#define EXIT9_IT9_INIT 0 +#define EXIT9_EINT9_INIT 0 +#define EXIT10_IT10_INIT 0 +#define EXIT10_EINT10_INIT 0 +#define EXIT11_IT11_INIT 0 +#define EXIT11_EINT11_INIT 0 +#define EXIT12_IT12_INIT 0 +#define EXIT12_EINT12_INIT 0 +#define EXIT13_IT13_INIT 0 +#define EXIT13_EINT13_INIT 0 +#define EXIT14_IT14_INIT 0 +#define EXIT14_EINT14_INIT 0 +#define EXIT15_IT15_INIT 0 +#define EXIT15_EINT15_INIT 0 +#define EXIT8_15_IP3_INIT 0 +#define EXIT8_15_EX8_15_INIT 0 +#endif +// +/*************************************** ʱ0 ************************************************/ +// ʱ0 +// ʱ0 +#define TIMER0_INIT_ENABLE 0 +/**************************************** ʱ0ʹ *************************************/ +#if TIMER0_INIT_ENABLE +// ʱ0 +// <0=> ڲʱ +// <1=> ⲿ +#define TIMER0_CT0_INIT 0 +// ʱ0 жϿ +// <0=> ر +// <1=> +#define TIMER0_ET0_INIT 2 +// ʱ0 жȼ +// ʱ0 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define TIMER0_IP0_INIT 12 +// ʱ0ʽ +// ע⣺ʽ 3 ʱ T0 ռ T1 TR1TF1 жԴ, TR1 T0 ռãʱҪر T1ɽ T1 Ϊʽ 3 +// <0=> ʽ0 16 λװضʱ/ +// <1=> ʽ1 16 λʱ/ +// <2=> ʽ2 8 λԶװֵʱ/ +// <3=> ʽ3 T0 ֳ(TL0/TH0) 8 λʱ/T1ֹͣ +#define TIMER0_M0_INIT 0 +// ʱ0ʱԴ +// ʱϵͳʱԴƵѡλ +// <0=> ʱ0 ʱΪ Fosc /12 +// <1=> ʱ0 ʱΪ Fosc +#define TIMER0_T0X12_INIT 1 +// ʱ0ſ +// ʱ0п +// <0=> ֹͣ ʱ0 +// <1=> ʱ0 +#define TIMER0_TR0_INIT 16 +// ʱ0ſλ +// <0=> ֻ TR0 Tx +// <1=> ֻ INT0 ˿ڵƽΪߵƽʱ TR0 1ʱ0 Ź +#define TIMER0_GATE0_INIT 0 +// +// ʱ0Ƚ +#define TIMER0_T0OUT_INIT 0 +// ʱ0ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define TIMER0_T0MAP_INIT 0x00 +// +// ʱ0ʱ +// ߰λ<0-255> +#define TIMER0_TH0_INIT 0xFA +// Ͱλ<0-255> +#define TIMER0_TL0_INIT 0xCB +// +#else +#define TIMER0_CT0_INIT 0 +#define TIMER0_ET0_INIT 0 +#define TIMER0_M0_INIT 0 +#define TIMER0_IP0_INIT 0 +#define TIMER0_T0X12_INIT 0 +#define TIMER0_TR0_INIT 0 +#define TIMER0_GATE0_INIT 0 +#define TIMER0_T0OUT_INIT 0 +#define TIMER0_T0MAP_INIT 0 +#define TIMER0_TL0_INIT 0x00 +#define TIMER0_TH0_INIT 0x00 +#endif +// + +/****************************************** ʱ1 *********************************************/ +// ʱ1 +// ʱ1 +#define TIMER1_INIT_ENABLE 0 +/******************************************* ʱ1ʹ *********************************************/ +#if TIMER1_INIT_ENABLE +// ʱ1 +// <0=> ڲʱ +// <1=> ⲿ +#define TIMER1_CT1_INIT 0 +// ʱ1 жϿ +// <0=> ر +// <1=> +#define TIMER1_ET1_INIT 8 +// ʱ1 жȼ +// ʱ1 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define TIMER1_IP0_INIT 0 +// ʱ1ʽ +// ע⣺ʽ 3 ʱ T0 ռ T1 TR1TF1 жԴ, TR1 T0 ռãʱҪر T1ɽ T1 Ϊʽ 3 +// <0=> ʽ0 16 λװضʱ/ +// <1=> ʽ1 16 λʱ/ +// <2=> ʽ2 8 λԶװֵʱ/ +#define TIMER1_M1_INIT 0 +// ʱ1ʱԴ +// ʱϵͳʱԴƵѡλ +// <0=> ʱ1 ʱΪ Fosc /12 +// <1=> ʱ1 ʱΪ Fosc +#define TIMER1_T1X12_INIT 0 +// ʱ1ſ +// ʱ1п +// <0=> ֹͣ ʱ1 +// <1=> ʱ1 +#define TIMER1_TR1_INIT 64 +// ʱ1ſλ +// <0=> ֻ TR1 Tx +// <1=> ֻ INT1 ˿ڵƽΪߵƽʱ TR0 1ʱ1 Ź +#define TIMER1_GATE1_INIT 0 +// +// ʱ1Ƚ +#define TIMER1_T1OUT_INIT 0 +// ʱ1ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define TIMER1_T1MAP_INIT 0x00 +// +// ʱ1ʱ +// ߰λ<0-255> +#define TIMER1_TH1_INIT 0xFA +// Ͱλ<0-255> +#define TIMER1_TL1_INIT 0xCB +// +/******************************************* ʱ1 ʧ ******************************************/ +#else +#define TIMER1_CT1_INIT 0 +#define TIMER1_ET1_INIT 0 +#define TIMER1_M1_INIT 0 +#define TIMER1_IP0_INIT 0 +#define TIMER1_T1X12_INIT 0 +#define TIMER1_TR1_INIT 0 +#define TIMER1_GATE1_INIT 0 +#define TIMER1_T1OUT_INIT 0 +#define TIMER1_T1MAP_INIT 0 +#define TIMER1_TL1_INIT 0x00 +#define TIMER1_TH1_INIT 0x00 +#endif +// +/*************************************** ʱ3 ************************************************/ +// ʱ3 +// ʱ3 +#define TIMER3_INIT_ENABLE 0 +/*************************************** ʱ3ʹ ***********************************************/ +#if TIMER3_INIT_ENABLE +// ʱ3 жϿ +// <0=> ر +// <1=> +#define TIMER3_ET3_INIT 2 +// ʱ3 +// <0=> ֹ +// <1=> +#define TIMER3_T3PD_INIT 64 +// ʱ3ʱԴ +// ʱʱԴѡ +// <0=> ϵͳʱ Fosc +// <1=> T3 ˿ⲿʱ +// <2=> ⲿƵ 32.768KHz +// <3=> ϵͳʱ Fosc +#define TIMER3_T3CLKS_INIT 0 + +// ʱ3ʱԤƵ +// ʱ 3 ԤƵѡλ +// <0=> 1Ƶ +// <1=> 8Ƶ +// <2=> 64Ƶ +// <3=> 256Ƶ +#define TIMER3_T3PS_INIT 0 + +// ʱ3п +// <0=> ֹͣ ʱ3 +// <1=> ʱ3 +#define TIMER3_TR3_INIT 0 + +// ʱ3 жȼ +// ʱ3 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define TIMER3_IP2_INIT 0 + +// ʱ3ʱ +// ߰λ<0-255> +#define TIMER3_TH3_INIT 255 +// Ͱλ<0-255> +#define TIMER3_TL3_INIT 255 +// + +// ʱ3 ӳ +#define TIMER3_T3MAP_ENABLE 0 +// +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define TIMER3_T3MAP_INIT 0x10 +// +/*************************************** ʱ3 ʧ ***********************************************/ +#else +#define TIMER3_ET3_INIT 0 +#define TIMER3_IP2_INIT 0 +#define TIMER3_T3PD_INIT 0 +#define TIMER3_T3CLKS_INIT 0 +#define TIMER3_T3PS_INIT 0 +#define TIMER3_TR3_INIT 0 +#define TIMER3_TH3_INIT 0 +#define TIMER3_TL3_INIT 0 +#define TIMER3_T3CLKSIN_INIT 0 +#define TIMER3_T3MAP_INIT 0 +#endif +// +/*************************************** ʱ4 ************************************************/ +// ʱ4 +// ʱ4 +#define TIMER4_INIT_ENABLE 0 +/*************************************** ʱ4 ʹ ***********************************************/ +#if TIMER4_INIT_ENABLE +// ʱ4 жϿ +// <0=> ر +// <1=> +#define TIMER4_ET4_INIT 4 +// ʱ4ʽ +// <0=> ʽ0 16 λװضʱ +// <1=> ʽ1 UART1 ʷ +// <2=> ʽ2 T4 ˿شֻϵͳʱӣT4CLKS Ч +// <3=> ʽ3 T4 ˿½شֻϵͳʱӣT4CLKS Ч +#define TIMER4_T4M_INIT 12 +// ʱ4ȽϹ +// <0=> ֹ +// <1=> +#define TIMER4_TC4_INIT 64 +// ʱ4ʱԤƵ +// ʱ 4 ԤƵѡλ +// <0=> 1Ƶ +// <1=> 8Ƶ +// <2=> 64Ƶ +// <3=> 256Ƶ +#define TIMER4_T4PS_INIT 48 +// ʱ4ʱԴ +// ʱʱԴѡ +// <0=> ϵͳʱ Fosc +// <1=> T4 ˿ⲿʱ +#define TIMER4_T4CLKS_INIT 0 +// ʱ4п +// <0=> ֹͣ ʱ4 +// <1=> ʱ4 +#define TIMER4_TR4_INIT 2 +// ʱ4 жȼ +// ʱ4 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define TIMER4_IP2_INIT 48 +// ʱ4ʱ +// ߰λ<0-255> +#define TIMER4_TH4_INIT 11 +// Ͱλ<0-255> +#define TIMER4_TL4_INIT 220 +// +// T4 ⲿ˿ӳ +#define TIMER4_T4CLKSIN_INIT 1 +// ʱ4ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define TIMER4_T4MAP_INIT 0x11 +// +/*************************************** ʱ4 ʧ ***********************************************/ +#else +#define TIMER4_ET4_INIT 0 +#define TIMER4_IP2_INIT 0 +#define TIMER4_T4PD_INIT 0 +#define TIMER4_T4CLKS_INIT 0 +#define TIMER4_T4PS_INIT 0 +#define TIMER4_TR4_INIT 0 +#define TIMER4_TH4_INIT 0 +#define TIMER4_TL4_INIT 0 +#define TIMER4_T4CLKSIN_INIT 0 +#define TIMER4_T4MAP_INIT 0 +#define TIMER4_T4M_INIT 0 +#define TIMER4_TC4_INIT 0 +#endif +// +/*************************************** ʱ5 ************************************************/ +// ʱ5 +// ʱ5 +#define TIMER5_INIT_ENABLE 0 +/*************************************** ʱ5 ʹ ***********************************************/ +#if TIMER5_INIT_ENABLE +// ʱ5ʽ +// <0=> ʽ0 16 λװضʱ +// <1=> ʽ1 UART2 ʷ +// <2=> ʽ2 16 λز +// <3=> ʽ3 16 λ½ز +#define TIMER5_T5M_INIT 0 +// T5 ϵⲿ¼/񴥷 +// <0=> ֹ +// <1=> +#define TIMER5_EXEN5_INIT 0 +// ʱ5 жϿ +// <0=> ر +// <1=> +#define TIMER5_ET5_INIT 0 +// ʱ5 жȼ +// ʱ5 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define TIMER5_IP3_INIT 0 +// ʱ5ʱԤƵ +// ʱ 5 ԤƵѡλ +// <0=> 1Ƶ +// <1=> 8Ƶ +// <2=> 64Ƶ +// <3=> 256Ƶ +#define TIMER5_T5PS_INIT 0 +// ʱ5п +// <0=> ֹͣ ʱ5 +// <1=> ʱ5 +#define TIMER5_TR5_INIT 0 +// ʱ5 +// ʱ 5 ԤƵѡλ +// <0=> T5 ŵı仯 +// <1=> ڲƵ RCŹļʱ +// <2=> UART1 RXD1 +// <3=> UART2 RXD2 +#define TIMER5_CAPM_INIT 0 +// ʱ5ʱ +// ߰λ<0-255> +#define TIMER5_TH5_INIT 255 +// Ͱλ<0-255> +#define TIMER5_TL5_INIT 255 +// +// ʱ5ӳ +#define TIMER5_T5MAP_ENABLE 0 +// +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define TIMER5_T5MAP_INIT 0x00 +// +/*************************************** ʱ5 ʧ ***********************************************/ +#else +#define TIMER5_T5M_INIT 0 +#define TIMER5_EXEN5_INIT 0 +#define TIMER5_ET5_INIT 0 +#define TIMER5_IP3_INIT 0 +#define TIMER5_T5PS_INIT 0 +#define TIMER5_TR5_INIT 0 +#define TIMER5_CAPM_INIT 0 +#define TIMER5_TH5_INIT 0 +#define TIMER5_TL5_INIT 0 +#define TIMER5_T5MAP_INIT 0 +#endif +// + + +/*************************************** PWM ģ ************************************************/ +// PWM ģ +// PWM +#define PWM_INIT_ENABLE 0 +/*************************************** PWM ģʹ ************************************************/ +#if PWM_INIT_ENABLE +/*************************************** PWM0 ģ ************************************************/ +// PWM0 ģ +// PWM0 +#define PWM0_INIT_ENABLE 1 +/*************************************** PWM0 ģʹ ***********************************************/ +#if PWM0_INIT_ENABLE +// PWM0 ģϼ +#define PWM0EN_EFLT0_INIT 16 +/*************************************** PWM0 ģϼʹ ***********************************************/ +#if PWM0EN_EFLT0_INIT +// ϼ +// <0=> FLT0 Ϊ͵ƽʱPWM ر +// <1=> FLT0 ΪߵƽʱPWM ر +#define PWM0C_FLT0C_INIT 16 +// Ԥ״̬ѡ +// <0=> PWM0&PWM01ڼΪ͵ƽ +// <1=> PWM0ڼ͵ƽ PWM01ڼߵƽ +// <2=> PWM0ڼߵƽ PWM01ڼ͵ƽ +// <3=> PWM0&PWM01ڼΪߵƽ +#define PWM0EN_FLT0_MODE_INIT 96 +// +/*************************************** PWM0 ģϼʧ ***********************************************/ +#else +#define PWM0C_FLT0C_INIT 0 +#define PWM0EN_FLT0_MODE_INIT 0 +#endif + +// PWM0 ģ鹤ģʽ +// ע⣺޸ PWM0 ģ鹤ģʽʱȹر PWM0 ģ顣 +// <0=> PWM0&PWM01 ڻģʽ +// <1=> PWM0&PWM01 ڶģʽ +#define PWM0EN_PWM0M_INIT 8 +// PWM0 ģģʽ +// <0=> PWM0PWM01ΪЧ +// <1=> PWM0ΪЧPWM01ΪЧ +// <2=> PWM0ΪЧPWM01ΪЧ +// <3=> PWM0 PWM01 ΪЧ +#define PWM0C_PWM0S_INIT 0 +// PWM0 ģʱԴ +// <0=> Fosc /1 +// <1=> Fosc /8 +// <2=> Fosc /32 +// <3=> Fosc /128 +#define PWM0C_CK0_INIT 1 +// PWM0 ģ +// ߰λ<0-255> +#define PWM0PH_INIT 3 +// Ͱλ<0-255> +#define PWM0PL_INIT 255 +// +/*************************************** PWM0 ***********************************************/ +// PWM0 +// PWM0 +#define PWM0OUT_INIT_ENABLE 1 +/*************************************** PWM0 ʹ ***********************************************/ +#if PWM0OUT_INIT_ENABLE +// PWM0 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM0_PWM0MAP_INIT 0x22 +// PWM0 ռձ +// ߰λ<0-255> +#define PWM0DH_INIT 15 +// Ͱλ<0-255> +#define PWM0DL_INIT 155 +// +// PWM0 +// <0=> ֹ PWM0 +// <1=> PWM0 +#define PWM0EN_PWM0_OEN_INIT 0 +// +/*************************************** PWM0 ʧ ***********************************************/ +#else +#define PWM0_PWM0MAP_INIT 0x37 +#define PWM0DH_INIT 0 +#define PWM0DL_INIT 0 +#define PWM0EN_PWM0_OEN_INIT 0 +#endif + +// PWM01 +// PWM01 +#define PWM01OUT_INIT_ENABLE 1 +#if PWM01OUT_INIT_ENABLE +/*************************************** PWM01 ʹ ***********************************************/ +// PWM01 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM0_PWM01MAP_INIT 0x23 +// PWM01 ռձ +// ߰λ<0-255> +#define PWM01DH_INIT 1 +// Ͱλ<0-255> +#define PWM01DL_INIT 55 +// +// PWM01 +// <0=> ֹ PWM01 +// <1=> PWM01 +#define PWM0EN_PWM01_OEN_INIT 4 +// +/*************************************** PWM01 ʧ ***********************************************/ +#else +#define PWM0_PWM01MAP_INIT 0x37 +#define PWM01DH_INIT 0 +#define PWM01DL_INIT 0 +#define PWM0EN_PWM01_OEN_INIT 0 +#endif + +/*************************************** PWM0 ģ ***********************************************/ +// PWM0 ģ +#define PWM0_DTHL_ENABLE 0 +/*************************************** PWM0 ģʹ ***********************************************/ +#if PWM0_DTHL_ENABLE +// ߰λ<0-255> +#define PWM0DTH_INIT 0 +// Ͱλ<0-255> +#define PWM0DTL_INIT 0 +// +/*************************************** PWM0 ģʧ ***********************************************/ +#else +#define PWM0DTH_INIT 0 +#define PWM0DTL_INIT 0 +#endif +// PWM0 ģʹ +// <0=> ر PWM0 ģ +// <1=> PWM0 ģ飨¼ +#define PWM0EN_PWM0_EN_INIT 1 +// PWM0 жϿ +// <0=> ֹ PWM0 ж +// <1=> PWM0 ж +#define PWM0C_PWM0IE_INIT 0 +/*************************************** PWM0 ʧ ***********************************************/ +#else +#define PWM0EN_EFLT0_INIT 0 +#define PWM0C_FLT0C_INIT 0 +#define PWM0EN_FLT0_MODE_INIT 0 +#define PWM0EN_PWM0M_INIT 0 +#define PWM0C_PWM0S_INIT 0 +#define PWM0C_CK0_INIT 0 +#define PWM0PH_INIT 255 +#define PWM0PL_INIT 255 +#define PWM0OUT_INIT_ENABLE 0 +#define PWM0_PWM0MAP_INIT 0x37 +#define PWM0DH_INIT 0 +#define PWM0DL_INIT 0 +#define PWM0EN_PWM0_OEN_INIT 0 +#define PWM01OUT_INIT_ENABLE 0 +#define PWM0_PWM01MAP_INIT 0x37 +#define PWM01DH_INIT 0 +#define PWM01DL_INIT 0 +#define PWM0EN_PWM01_OEN_INIT 0 +#define PWM0_DTHL_ENABLE 0 +#define PWM0DTH_INIT 0 +#define PWM0DTL_INIT 0 +#define PWM0EN_PWM0_EN_INIT 0 +#define PWM0C_PWM0IE_INIT 0 +#endif +// + +/*************************************** PWM1 ģ ************************************************/ +// PWM1 ģ +// PWM1 +#define PWM1_INIT_ENABLE 0 +/*************************************** PWM1 ģʹ ***********************************************/ +#if PWM1_INIT_ENABLE +// PWM1 ģϼ +#define PWM1EN_EFLT0_INIT 16 +/*************************************** PWM1 ģϼʹ ***********************************************/ +#if PWM1EN_EFLT0_INIT +// ϼ +// <0=> FLT0 Ϊ͵ƽʱPWM ر +// <1=> FLT0 ΪߵƽʱPWM ر +#define PWM1C_FLT0C_INIT 16 +// Ԥ״̬ѡ +// <0=> PWM1&PWM11ڼΪ͵ƽ +// <1=> PWM1ڼ͵ƽ PWM11ڼߵƽ +// <2=> PWM1ڼߵƽ PWM11ڼ͵ƽ +// <3=> PWM1&PWM11ڼΪߵƽ +#define PWM1EN_FLT0_MODE_INIT 0 +// +/*************************************** PWM1 ģϼ ʧ ***********************************************/ +#else +#define PWM1C_FLT0C_INIT 0 +#define PWM1EN_FLT0_MODE_INIT 0 +#endif + +// PWM1 ģ鹤ģʽ +// ע⣺޸ PWM1 ģ鹤ģʽʱȹر PWM1 ģ顣 +// <0=> PWM1&PWM11 ڻģʽ +// <1=> PWM1&PWM11 ڶģʽ +#define PWM1EN_PWM1M_INIT 8 +// PWM1 ģģʽ +// <0=> PWM1PWM11ΪЧ +// <1=> PWM1ΪЧPWM11ΪЧ +// <2=> PWM1ΪЧPWM11ΪЧ +// <3=> PWM1 PWM11 ΪЧ +#define PWM1C_PWM1S_INIT 0 +// PWM1 ģʱԴ +// <0=> Fosc /1 +// <1=> Fosc /8 +// <2=> Fosc /32 +// <3=> Fosc /128 +#define PWM1C_CK0_INIT 1 +// PWM1 ģ +// ߰λ<0-255> +#define PWM1PH_INIT 3 +// Ͱλ<0-255> +#define PWM1PL_INIT 255 +// +/*************************************** PWM1 ***********************************************/ +// PWM1 +// PWM1 +#define PWM1OUT_INIT_ENABLE 1 +/*************************************** PWM1 ʹ ***********************************************/ +#if PWM1OUT_INIT_ENABLE +// PWM1 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM1_PWM1MAP_INIT 0x22 +// PWM1 ռձ +// ߰λ<0-255> +#define PWM1DH_INIT 128 +// Ͱλ<0-255> +#define PWM1DL_INIT 255 +// +// PWM1 +// <0=> ֹ PWM1 +// <1=> PWM1 +#define PWM1EN_PWM1_OEN_INIT 2 +// +/*************************************** PWM1 ʧ ***********************************************/ +#else +#define PWM1_PWM1MAP_INIT 0x37 +#define PWM1DH_INIT 0 +#define PWM1DL_INIT 0 +#define PWM1EN_PWM1_OEN_INIT 0 +#endif + +// PWM11 +// PWM11 +#define PWM11OUT_INIT_ENABLE 1 +#if PWM11OUT_INIT_ENABLE +/*************************************** PWM11 ʹ ***********************************************/ +// PWM11 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM1_PWM11MAP_INIT 0x23 +// PWM11 ռձ +// ߰λ<0-255> +#define PWM11DH_INIT 1 +// Ͱλ<0-255> +#define PWM11DL_INIT 85 +// +// PWM11 +// <0=> ֹ PWM11 +// <1=> PWM11 +#define PWM1EN_PWM11_OEN_INIT 4 +// +/*************************************** PWM11 ʧ ***********************************************/ +#else +#define PWM1_PWM11MAP_INIT 0x37 +#define PWM11DH_INIT 0 +#define PWM11DL_INIT 0 +#define PWM1EN_PWM11_OEN_INIT 0 +#endif + +/*************************************** PWM1 ģ ***********************************************/ +// PWM1 ģ +#define PWM1_DTHL_ENABLE 0 +/*************************************** PWM1 ģʹ ***********************************************/ +#if PWM1_DTHL_ENABLE +// ߰λ<0-255> +#define PWM1DTH_INIT 0 +// Ͱλ<0-255> +#define PWM1DTL_INIT 0 +// +/*************************************** PWM1 ģʧ ***********************************************/ +#else +#define PWM1DTH_INIT 0 +#define PWM1DTL_INIT 0 +#endif +// PWM1 ģʹ +// <0=> ر PWM1 ģ +// <1=> PWM1 ģ飨¼ +#define PWM1EN_PWM1_EN_INIT 1 +// PWM1 жϿ +// <0=> ֹ PWM1 ж +// <1=> PWM1 ж +#define PWM1C_PWM1IE_INIT 0 +/*************************************** PWM1 ʧ ***********************************************/ +#else +#define PWM1EN_EFLT0_INIT 0 +#define PWM1C_FLT0C_INIT 0 +#define PWM1EN_FLT0_MODE_INIT 0 +#define PWM1EN_PWM1M_INIT 0 +#define PWM1C_PWM1S_INIT 0 +#define PWM1C_CK0_INIT 0 +#define PWM1PH_INIT 255 +#define PWM1PL_INIT 255 +#define PWM1OUT_INIT_ENABLE 0 +#define PWM1_PWM1MAP_INIT 0x37 +#define PWM1DH_INIT 0 +#define PWM1DL_INIT 0 +#define PWM1EN_PWM1_OEN_INIT 0 +#define PWM11OUT_INIT_ENABLE 0 +#define PWM1_PWM11MAP_INIT 0x37 +#define PWM11DH_INIT 0 +#define PWM11DL_INIT 0 +#define PWM1EN_PWM11_OEN_INIT 0 +#define PWM1_DTHL_ENABLE 0 +#define PWM1DTH_INIT 0 +#define PWM1DTL_INIT 0 +#define PWM1EN_PWM1_EN_INIT 0 +#define PWM1C_PWM1IE_INIT 0 +#endif +// + +/*************************************** PWM2 ģ ************************************************/ +// PWM2 ģ +// PWM2 +#define PWM2_INIT_ENABLE 0 +/*************************************** PWM2 ģʹ ***********************************************/ +#if PWM2_INIT_ENABLE +// PWM2 ģϼ +#define PWM2EN_EFLT0_INIT 0 +/*************************************** PWM2 ģϼʹ ***********************************************/ +#if PWM2EN_EFLT0_INIT +// ϼ +// <0=> FLT0 Ϊ͵ƽʱPWM ر +// <1=> FLT0 ΪߵƽʱPWM ر +#define PWM2C_FLT0C_INIT 16 +// Ԥ״̬ѡ +// <0=> PWM2&PWM21ڼΪ͵ƽ +// <1=> PWM2ڼ͵ƽ PWM21ڼߵƽ +// <2=> PWM2ڼߵƽ PWM21ڼ͵ƽ +// <3=> PWM2&PWM21ڼΪߵƽ +#define PWM2EN_FLT0_MODE_INIT 0 +// +/*************************************** PWM2 ģϼʧ ***********************************************/ +#else +#define PWM2C_FLT0C_INIT 0 +#define PWM2EN_FLT0_MODE_INIT 0 +#endif + +// PWM2 ģ鹤ģʽ +// ע⣺޸ PWM2 ģ鹤ģʽʱȹر PWM2 ģ顣 +// <0=> PWM2&PWM21 ڻģʽ +// <1=> PWM2&PWM21 ڶģʽ +#define PWM2EN_PWM2M_INIT 8 +// PWM2 ģģʽ +// <0=> PWM2PWM21ΪЧ +// <1=> PWM2ΪЧPWM21ΪЧ +// <2=> PWM2ΪЧPWM21ΪЧ +// <3=> PWM2 PWM21 ΪЧ +#define PWM2C_PWM2S_INIT 0 +// PWM2 ģʱԴ +// <0=> Fosc /1 +// <1=> Fosc /8 +// <2=> Fosc /32 +// <3=> Fosc /128 +#define PWM2C_CK0_INIT 1 +// PWM2 ģ +// ߰λ<0-255> +#define PWM2PH_INIT 3 +// Ͱλ<0-255> +#define PWM2PL_INIT 255 +// +/*************************************** PWM2 ***********************************************/ +// PWM2 +// PWM2 +#define PWM2OUT_INIT_ENABLE 1 +/*************************************** PWM2 ʹ ***********************************************/ +#if PWM2OUT_INIT_ENABLE +// PWM2 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM2_PWM2MAP_INIT 0x00 +// PWM2 ռձ +// ߰λ<0-255> +#define PWM2DH_INIT 1 +// Ͱλ<0-255> +#define PWM2DL_INIT 85 +// +// PWM2 +// <0=> ֹ PWM2 +// <1=> PWM2 +#define PWM2EN_PWM2_OEN_INIT 2 +// +/*************************************** PWM2 ʧ ***********************************************/ +#else +#define PWM2_PWM2MAP_INIT 0x37 +#define PWM2DH_INIT 0 +#define PWM2DL_INIT 0 +#define PWM2EN_PWM2_OEN_INIT 0 +#endif + +// PWM21 +// PWM21 +#define PWM21OUT_INIT_ENABLE 1 +#if PWM21OUT_INIT_ENABLE +/*************************************** PWM21 ʹ ***********************************************/ +// PWM21 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM2_PWM21MAP_INIT 0x01 +// PWM21 ռձ +// ߰λ<0-255> +#define PWM21DH_INIT 1 +// Ͱλ<0-255> +#define PWM21DL_INIT 85 +// +// PWM21 +// <0=> ֹ PWM21 +// <1=> PWM21 +#define PWM2EN_PWM21_OEN_INIT 4 +// +/*************************************** PWM21 ʧ ***********************************************/ +#else +#define PWM2_PWM21MAP_INIT 0x37 +#define PWM21DH_INIT 0 +#define PWM21DL_INIT 0 +#define PWM2EN_PWM21_OEN_INIT 0 +#endif + +/*************************************** PWM2 ģ ***********************************************/ +// PWM2 ģ +#define PWM2_DTHL_ENABLE 0 +/*************************************** PWM2 ģʹ ***********************************************/ +#if PWM2_DTHL_ENABLE +// ߰λ<0-255> +#define PWM2DTH_INIT 0 +// Ͱλ<0-255> +#define PWM2DTL_INIT 0 +// +/*************************************** PWM2 ģʧ ***********************************************/ +#else +#define PWM2DTH_INIT 0 +#define PWM2DTL_INIT 0 +#endif +// PWM2 ģʹ +// <0=> ر PWM2 ģ +// <1=> PWM2 ģ飨¼ +#define PWM2EN_PWM2_EN_INIT 1 +// PWM2 жϿ +// <0=> ֹ PWM2 ж +// <1=> PWM2 ж +#define PWM2C_PWM2IE_INIT 0 +/*************************************** PWM2 ʧ ***********************************************/ +#else +#define PWM2EN_EFLT0_INIT 0 +#define PWM2C_FLT0C_INIT 0 +#define PWM2EN_FLT0_MODE_INIT 0 +#define PWM2EN_PWM2M_INIT 0 +#define PWM2C_PWM2S_INIT 0 +#define PWM2C_CK0_INIT 0 +#define PWM2PH_INIT 255 +#define PWM2PL_INIT 255 +#define PWM2OUT_INIT_ENABLE 0 +#define PWM2_PWM2MAP_INIT 0x37 +#define PWM2DH_INIT 0 +#define PWM2DL_INIT 0 +#define PWM2EN_PWM2_OEN_INIT 0 +#define PWM21OUT_INIT_ENABLE 0 +#define PWM2_PWM21MAP_INIT 0x37 +#define PWM21DH_INIT 0 +#define PWM21DL_INIT 0 +#define PWM2EN_PWM21_OEN_INIT 0 +#define PWM2_DTHL_ENABLE 0 +#define PWM2DTH_INIT 0 +#define PWM2DTL_INIT 0 +#define PWM2EN_PWM2_EN_INIT 0 +#define PWM2C_PWM2IE_INIT 0 +// +#endif + +/*************************************** PWM3 ģ ************************************************/ +// PWM3 ģ +// PWM3 +#define PWM3_INIT_ENABLE 0 +#if PWM3_INIT_ENABLE +// PWM3 ģģʽ +// <0=> PWM3 ЧڼΪߵƽ +// <3=> PWM3 ЧڼΪ͵ƽ +#define PWM3C_PWM3S_INIT 0 +// PWM3 ģʱԴ +// <0=> Fosc /1 +// <1=> Fosc /2 +// <2=> Fosc /4 +// <3=> Fosc /8 +// <4=> Fosc /16 +// <5=> Fosc /32 +// <6=> Fosc /64 +// <7=> Fosc /128 +#define PWM3C_PTCK3_INIT 2 +// PWM3 жϿ +// <0=> ֹ PWM3 ж +// <1=> PWM3 ж +#define PWM3C_PWM3IE_INIT 0 +// PWM3 +// <0=> ֹ +// <1=> +#define PWM3C_PWM3OEN_INIT 16 +// PWM3 ӳ +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define PWM3_PWM3MAP_INIT 0 +// PWM3 ģʹ +// <0=> ر PWM3 ģ +// <1=> PWM3 ģ飨¼ +#define PWM3C_PWM3EN_INIT 128 +// PWM3 ģ<0-255> +#define PWM3P_INIT 255 +// PWM3 ģռձ<0-255> +#define PWM3D_INIT 85 +/*************************************** PWM3 ʧ ***********************************************/ +#else +#define PWM3C_PWM3S_INIT 0 +#define PWM3C_PTCK3_INIT 0 +#define PWM3C_PWM3OEN_INIT 0 +#define PWM3C_PWM3IE_INIT 0 +#define PWM3C_PWM3EN_INIT 0 +#define PWM3P_INIT 0 +#define PWM3D_INIT 0 +// +#endif +// PWM жȼ +// PWM жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define PWM_IP2_INIT 0 +/*************************************** PWM ģʧ ************************************************/ +#else +#define PWM0_INIT_ENABLE 0 +#define PWM0EN_EFLT0_INIT 0 +#define PWM0C_FLT0C_INIT 0 +#define PWM0EN_FLT0_MODE_INIT 0 +#define PWM0EN_PWM0M_INIT 0 +#define PWM0C_PWM0S_INIT 0 +#define PWM0C_CK0_INIT 0 +#define PWM0PH_INIT 255 +#define PWM0PL_INIT 255 +#define PWM0OUT_INIT_ENABLE 0 +#define PWM0_PWM0MAP_INIT 0x37 +#define PWM0DH_INIT 0 +#define PWM0DL_INIT 0 +#define PWM0EN_PWM0_OEN_INIT 0 +#define PWM01OUT_INIT_ENABLE 0 +#define PWM0_PWM01MAP_INIT 0x37 +#define PWM01DH_INIT 0 +#define PWM01DL_INIT 0 +#define PWM0EN_PWM01_OEN_INIT 0 +#define PWM0_DTHL_ENABLE 0 +#define PWM0DTH_INIT 0 +#define PWM0DTL_INIT 0 +#define PWM0EN_PWM0_EN_INIT 0 +#define PWM0C_PWM0IE_INIT 0 + +#define PWM1_INIT_ENABLE 0 +#define PWM1EN_EFLT0_INIT 0 +#define PWM1C_FLT0C_INIT 0 +#define PWM1EN_FLT0_MODE_INIT 0 +#define PWM1EN_PWM1M_INIT 0 +#define PWM1C_PWM1S_INIT 0 +#define PWM1C_CK0_INIT 0 +#define PWM1PH_INIT 255 +#define PWM1PL_INIT 255 +#define PWM1OUT_INIT_ENABLE 0 +#define PWM1_PWM1MAP_INIT 0x37 +#define PWM1DH_INIT 0 +#define PWM1DL_INIT 0 +#define PWM1EN_PWM1_OEN_INIT 0 +#define PWM11OUT_INIT_ENABLE 0 +#define PWM1_PWM11MAP_INIT 0x37 +#define PWM11DH_INIT 0 +#define PWM11DL_INIT 0 +#define PWM1EN_PWM11_OEN_INIT 0 +#define PWM1_DTHL_ENABLE 0 +#define PWM1DTH_INIT 0 +#define PWM1DTL_INIT 0 +#define PWM1EN_PWM1_EN_INIT 0 +#define PWM1C_PWM1IE_INIT 0 + +#define PWM2_INIT_ENABLE 0 +#define PWM2EN_EFLT0_INIT 0 +#define PWM2C_FLT0C_INIT 0 +#define PWM2EN_FLT0_MODE_INIT 0 +#define PWM2EN_PWM2M_INIT 0 +#define PWM2C_PWM2S_INIT 0 +#define PWM2C_CK0_INIT 0 +#define PWM2PH_INIT 255 +#define PWM2PL_INIT 255 +#define PWM2OUT_INIT_ENABLE 0 +#define PWM2_PWM2MAP_INIT 0x37 +#define PWM2DH_INIT 0 +#define PWM2DL_INIT 0 +#define PWM2EN_PWM2_OEN_INIT 0 +#define PWM21OUT_INIT_ENABLE 0 +#define PWM2_PWM21MAP_INIT 0x37 +#define PWM21DH_INIT 0 +#define PWM21DL_INIT 0 +#define PWM2EN_PWM21_OEN_INIT 0 +#define PWM2_DTHL_ENABLE 0 +#define PWM2DTH_INIT 0 +#define PWM2DTL_INIT 0 +#define PWM2EN_PWM2_EN_INIT 0 +#define PWM2C_PWM2IE_INIT 0 + +#define PWM3_INIT_ENABLE 0 +#define PWM3C_PWM3S_INIT 0 +#define PWM3C_PTCK3_INIT 0 +#define PWM3C_PWM3OEN_INIT 0 +#define PWM3C_PWM3IE_INIT 0 +#define PWM3C_PWM3EN_INIT 0 +#define PWM3P_INIT 0 +#define PWM3D_INIT 0 + +#define PWM_IP2_INIT 0 + +#endif +// + + + +/*************************************** ADC ************************************************/ +//ADC +// ADC +#define ADC_INIT_ENABLE 0 +#if ADC_INIT_ENABLE + +// ADC ģԴʹ +#define ADCC0_ADCEN_INIT 128 + +// ADC ж +#define ADC_INT_ENABLE 0 +#if ADC_INT_ENABLE +// ADC жϿ +// <0=> ر +// <1=> +#define ADC_EADC_INIT 32 +// ADC жȼ +// ADC жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define ADC_IP3_INIT 4 +// +#else +#define ADC_EADC_INIT 0 +#define ADC_IP3_INIT 0 + +#endif + + + +// ADC ת +#define ADCC0_ADCST_INIT 64 + +// ڲ VREF +#define ADCC0_VREFS_INIT 4 +// ڲ׼ѹԴѡ +// ڲοѹѡΪ2V ʱ VDD ѹ 2.7Vڲοѹѡ 3/4V ʱ VDD ڲοѹ 0.5V ϡ +// ϵͳģʽǰ齫 ADC οѹѡ VDDԽһϵͳġ +// <0=> VDDź +// <1=> ڲ4V +// <2=> ڲ3V +// <3=> ڲ2V +#define ADCC0_INREF_S_INIT 2 +// Vref +#define ADCC0_VREFO_INIT 0 +// + +// ADCͨѡ +// <0x4F=> ڲVDD/4ź +// <0xCF=> ڲGNDź +// <0=> ⲿͨ0 +// <1=> ⲿͨ1 +// <2=> ⲿͨ2 +// <3=> ⲿͨ3 +// <4=> ⲿͨ4 +// <5=> ⲿͨ5 +// <6=> ⲿͨ6 +// <7=> ⲿͨ7 +// <8=> ⲿͨ8 +// <9=> ⲿͨ9 +// <10=> ⲿͨ10 +#define ADCC1_INIT 0 + +// ADCתݳ +// <0=> 12 λ(߰λλ) +// <1=> 12 λ(λͰλ) +// <2=> 10 λ(߰λͶλ) +// <3=> 10 λ(߶λͰλ) +#define ADCC2_ADCL_ALIGN_INIT 64 + +// ADCתʱ +// Ϊ˱֤ȣADCתҪ +// <0=> ADCʱƵ4MHZ +// <1=> ADCʱƵ1MHZ/2MHZ +// <3=> ADCʱƵС1MHZ +#define ADCC2_ADCTS_INIT 0 + +// ADC ʱ +// <0=> Fosc /2 +// <1=> Fosc /4 +// <2=> Fosc /6 +// <3=> Fosc /8 +// <4=> Fosc /12 +// <5=> Fosc /16 +// <6=> Fosc /24 +// <7=> Fosc /32 +#define ADCC2_ADCS_INIT 0 + +// ADC +#define ADCWC_AMWEN_INIT 0 +// +#else +#define ADC_INT_ENABLE 0 +#define ADC_EADC_INIT 0 +#define ADC_IP3_INIT 0 +#define ADCC0_ADCEN_INIT 0 +#define ADCC0_ADCST_INIT 0 +#define ADCC0_VREFS_INIT 0 +#define ADCC0_INREF_S_INIT 0 +#define ADCC0_VREFO_INIT 0 +#define ADCC1_INIT 0 +#define ADCC2_ADCL_ALIGN_INIT 0 +#define ADCC2_ADCTS_INIT 0 +#define ADCC2_ADCS_INIT 0 +#define ADCWC_AMWEN_INIT 0 +#endif + + +/*************************************** UART1 ************************************************/ +//UART1 +// UART1 +#define UART1_INIT_ENABLE 0 +/*************************************** UART1 ģʹ ************************************************/ +#if UART1_INIT_ENABLE +// нʹܿλ +#define UART1_REN_INIT 0x00 + +// UART1 ж +#define UART1_INT_ENABLE 0 +/*************************************** UART1ж ʹ ************************************************/ +#if UART1_INT_ENABLE +// UART1 жϿ +// <0=> ر +// <1=> +#define UART1_ES1_INIT 0 +// UART1 жȼ +// UART1 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define UART1_IP1_INIT 0 +// +#else +#define UART1_ES1_INIT 0 +#define UART1_IP1_INIT 0 +#endif + +// TXD ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define UART1_TXDMAP_INIT 1 + +// RXD ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define UART1_RXDMAP_INIT 0 +/*************************************** UART ʽ0 ************************************************/ +// ʽ0 +#define UART1_MODEL0_ENABLE 0x00 +/*************************************** ʽ0 ʹ ************************************************/ +#if UART1_MODEL0_ENABLE +// ģʽ0 ͨٶ +// <0=> ģʽ0 ʱΪ Fosc /12 +// <1=> ģʽ0 ʱΪ Fosc /2 +#define UART1_MODEL0_UX6_INIT 0x00 +/*************************************** ʽ0 ʧ ************************************************/ +#else +#define UART1_MODEL0_UX6_INIT 0x00 +#endif +// +/*************************************** UART ʽ1 ************************************************/ +// ʽ1 +#define UART1_MODEL1_ENABLE 0x00 +/*************************************** ʽ1 ʹ ************************************************/ +#if UART1_MODEL1_ENABLE +// ֹͣλʹ +// <0=> ֹͣλֹͣλ 0 1 λ RI +// <1=> ֹͣλȷϼ飬ֻЧֹͣλ1λ RI +#define UART1_MODEL1_SM2_INIT 0x00 +/*************************************** ʽ1 ʧ ************************************************/ +#else +#define UART1_MODEL1_SM2_INIT 0x00 +#endif +// +/*************************************** UART ʽ2 ************************************************/ +// ʽ2 +#define UART1_MODEL2_ENABLE 0x00 +/*************************************** ʽ2 ʹ ************************************************/ +#if UART1_MODEL2_ENABLE +// ʼӱ +// <0=> Ϊϵͳʱ Fosc 1/64 +// <1=> Ϊϵͳʱ Fosc 1/32 +#define UART1_MODEL2_SMOD_INIT 0x00 +// ͨʹ +#define UART1_MODEL2_SM2_INIT 0x00 +/*************************************** ʽ2 ͨѶʹ ************************************************/ +#if UART1_MODEL2_SM2_INIT +// ӻַ<0-255> +#define UART1_MODEL2_SADDR_INIT 0 +// ӻ<0-255> +#define UART1_MODEL2_SADEN_INIT 0 +/*************************************** ʽ2 ͨѶʧ ************************************************/ +#else +#define UART1_MODEL2_SADDR_INIT 0 +#define UART1_MODEL2_SADEN_INIT 0 +#endif +// +/*************************************** ʽ2 ʧ ************************************************/ +#else +#define UART1_MODEL2_SMOD_INIT 0x00 +#define UART1_MODEL2_SM2_INIT 0x00 +#define UART1_MODEL2_SADDR_INIT 0 +#define UART1_MODEL2_SADEN_INIT 0 +#endif +// +/*************************************** UART ʽ3 ************************************************/ +// ʽ3 +#define UART1_MODEL3_ENABLE 0x00 +/*************************************** ʽ3 ʹ ************************************************/ +#if UART1_MODEL3_ENABLE +// ͨʹ +#define UART1_MODEL3_SM2_INIT 0x00 +/*************************************** ʽ3 ͨѶʹ ************************************************/ +#if UART1_MODEL3_SM2_INIT +// ӻַ<0-255> +#define UART1_MODEL3_SADDR_INIT 0 +// ӻ<0-255> +#define UART1_MODEL3_SADEN_INIT 0 +/*************************************** ʽ3 ͨѶʧ ************************************************/ +#else +#define UART1_MODEL3_SADDR_INIT 0 +#define UART1_MODEL3_SADEN_INIT 0 +#endif +// +/*************************************** ʽ3 ʧ ************************************************/ +#else +#define UART1_MODEL3_SM2_INIT 0x00 +#define UART1_MODEL3_SADDR_INIT 0 +#define UART1_MODEL3_SADEN_INIT 0 +#endif +// +/*************************************** UART1 ģʧ ************************************************/ +#else +#define UART1_MODEL0_ENABLE 0x00 +#define UART1_MODEL1_ENABLE 0x00 +#define UART1_MODEL2_ENABLE 0x00 +#define UART1_MODEL3_ENABLE 0x00 +#define UART1_INT_ENABLE 0 + +#define UART1_ES1_INIT 0 +#define UART1_IP1_INIT 0 +#define UART1_TXDMAP_INIT 0 +#define UART1_RXDMAP_INIT 0 +#define UART1_MODEL0_UX6_INIT 0x00 +#define UART1_MODEL1_SM2_INIT 0x00 +#define UART1_MODEL2_SMOD_INIT 0x00 +#define UART1_MODEL2_SM2_INIT 0x00 +#define UART1_MODEL2_SADDR_INIT 0 +#define UART1_MODEL2_SADEN_INIT 0 +#define UART1_MODEL3_SM2_INIT 0x00 +#define UART1_MODEL3_SADDR_INIT 0 +#define UART1_MODEL3_SADEN_INIT 0 + +#endif +// + + +/*************************************** UART2 ************************************************/ +//UART2 +// UART2 +#define UART2_INIT_ENABLE 0 +/*************************************** UART2 ģʹ ************************************************/ +#if UART2_INIT_ENABLE +// нʹܿλ +#define UART2_REN_INIT 0x00 + +// UART2 ж +#define UART2_INT_ENABLE 0 +/*************************************** UART2ж ʹ ************************************************/ +#if UART2_INT_ENABLE +// UART2 жϿ +// <0=> ر +// <1=> +#define UART2_ES2_INIT 0 +// UART2 жȼ +// UART2 жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define UART2_IP1_INIT 0 +// +#else +#define UART2_ES2_INIT 0 +#define UART2_IP1_INIT 0 +#endif + +// TXD ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define UART2_TXD2MAP_INIT 1 + +// RXD ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define UART2_RXD2MAP_INIT 0 + +// ʽѡ +// <0x00=> 8 λ UARTʱ 5 /16 +// <0x01=> 9 λ UARTʱ 5 /16 + +// ھλʹ +// <0x00=> +// <0x01=> +#define UART2_S2CON2_INIT 0 + +/*************************************** UART2 ģʧ ************************************************/ +#else +#define UART2_INT_ENABLE 0 +#define UART2_ES2_INIT 0 +#define UART2_IP1_INIT 0 +#define UART2_TXD2MAP_INIT 0x37 +#define UART2_RXD2MAP_INIT 0x37 +#define UART2_S2CON2_INIT 0 +#endif +// + +/*************************************** SPI ************************************************/ +//SPI +// SPI +#define SPI_INIT_ENABLE 0 +/*************************************** SPI ģʹ ************************************************/ +#if SPI_INIT_ENABLE +// SS ʹλ +// SPI ʹλ +// ͷѡ +// <0x00=> MSBȷ +// <0x01=> LSBȷ +// /ӻģʽѡ +// <0x00=> ӻģʽ +// <0x01=> ģʽ +// SPI ʱӼѡ +// <0x00=> SCK ʱΪ͵ƽ +// <0x01=> SCK ʱΪߵƽ +// SPI ʱλѡ +// <0x00=> SPI ʱӵĵһز +// <0x01=> SPI ʱӵĵڶز +// SPI ʱѡ +// <0x00=> Fosc /4 +// <0x01=> Fosc /16 +// <0x02=> Fosc /64 +// <0x03=> Fosc /128 +#define SPI_SPCTL_INIT 0x00 + +// MOSI ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define SPI_MOSIMAP_INIT 0 + +// MISO ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define SPI_MISOMAP_INIT 0 + +// SCK ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define SPI_SCKMAP_INIT 0x37 + +// SS ӳ +// <0x37=> Not Used +// <0x00=> P00 +// <0x01=> P01 +// <0x02=> P02 +// <0x03=> P03 +// <0x04=> P04 +// <0x05=> P05 +// <0x06=> P06 +// <0x07=> P07 +// <0x10=> P10 +// <0x11=> P11 +// <0x20=> P20 +// <0x21=> P21 +// <0x22=> P22 +// <0x23=> P23 +// <0x24=> P24 +// <0x25=> P25 +// <0x26=> P26 +// <0x27=> P27 +#define SPI_SSMAP_INIT 0x37 + + + +// SPI ж +#define SPI_INT_ENABLE 0 +/*************************************** SPIж ʹ ************************************************/ +#if SPI_INT_ENABLE +// SPI жϿ +// <0=> ر +// <1=> +#define SPI_ESPI_INIT 0 +// SPI жȼ +// SPI жȼ +// <0=> ȼ 0ͣ +// <1=> ȼ 1 +// <2=> ȼ 2 +// <3=> ȼ 3ߣ +#define SPI_IP2_INIT 0 +// +#else +#define SPI_ESPI_INIT 0 +#define SPI_IP2_INIT 0 +#endif +// +#else + +#define SPI_SPCTL_INIT 0x00 +#define SPI_INT_ENABLE 0 +#define SPI_ESPI_INIT 0 +#define SPI_IP2_INIT 0 +#endif +//------------- <<< end of configuration section >>> --------------------------- + +#define EXIT_INT01_PINS_INIT (EXIT1_INT1_PINS_INIT + EXIT0_INT0_PINS_INIT) +#define EXIT_PITS0_INIT (EXIT0_IT0_INIT + EXIT1_IT1_INIT + EXIT2_IT2_INIT + EXIT3_IT3_INIT) +#define EXIT_PITS1_INIT (EXIT4_IT4_INIT + EXIT5_IT5_INIT + EXIT6_IT6_INIT + EXIT7_IT7_INIT) +#define EXIT_PITS2_INIT (EXIT8_IT8_INIT + EXIT9_IT9_INIT + EXIT10_IT10_INIT + EXIT11_IT11_INIT) +#define EXIT_PITS3_INIT (EXIT12_IT12_INIT + EXIT13_IT13_INIT + EXIT14_IT14_INIT + EXIT15_IT15_INIT) +#define EXIT_PINTE0_INIT (EXIT2_EINT2_INIT + EXIT3_EINT3_INIT + EXIT4_EINT4_INIT + EXIT5_EINT5_INIT \ + + EXIT6_EINT6_INIT + EXIT7_EINT7_INIT) +#define EXIT_PINTE1_INIT (EXIT8_EINT8_INIT + EXIT9_EINT9_INIT + EXIT10_EINT10_INIT + EXIT11_EINT11_INIT \ + + EXIT12_EINT12_INIT + EXIT13_EINT13_INIT + EXIT14_EINT14_INIT + EXIT15_EINT15_INIT) +#define INT_IE_INIT (WDT_EWT_INIT + EXIT0_EX0_INIT + EXIT1_EX1_INIT + TIMER0_ET0_INIT + TIMER1_ET1_INIT + \ + UART1_ES1_INIT + UART2_ES2_INIT) +#define INT_IE1_INIT (EXIT2_7_EX2_7_INIT + EXIT8_15_EX8_15_INIT + TIMER3_ET3_INIT + TIMER4_ET4_INIT \ + + TIMER5_ET5_INIT + ADC_EADC_INIT + UART1_ES1_INIT+ SPI_ESPI_INIT) +#define INT_IP0_INIT (EXIT1_IP0_INIT + EXIT0_IP0_INIT + TIMER0_IP0_INIT + TIMER1_IP0_INIT) +#define INT_IP1_INIT (WDT_IP1_INIT + UART1_IP1_INIT +UART2_IP1_INIT + LVD_IP1_INIT) +#define INT_IP2_INIT (TIMER3_IP2_INIT + TIMER4_IP2_INIT + PWM_IP2_INIT + SPI_IP2_INIT) +#define INT_IP3_INIT (EXIT8_15_IP3_INIT + EXIT2_7_IP3_INIT + TIMER5_IP3_INIT + ADC_IP3_INIT) + +#define TIMER01_TCON_INIT (TIMER0_TR0_INIT + TIMER1_TR1_INIT) +#define TIMER01_TCON1_INIT (TIMER0_T0OUT_INIT + TIMER0_T0X12_INIT + TIMER1_T1OUT_INIT + TIMER1_T1X12_INIT) +#define TIMER01_TMOD_INIT (TIMER0_GATE0_INIT + TIMER0_CT0_INIT + TIMER0_M0_INIT \ + + TIMER1_GATE1_INIT + TIMER1_CT1_INIT + TIMER1_M1_INIT ) +#define TIMER3_TCON_INIT (TIMER3_TR3_INIT + TIMER3_T3PD_INIT + TIMER3_T3PS_INIT + TIMER3_T3CLKS_INIT) +#define TIMER4_TCON_INIT (TIMER4_TC4_INIT + TIMER4_T4PS_INIT + TIMER4_T4M_INIT + TIMER4_TR4_INIT + TIMER4_T4CLKS_INIT) +#define TIMER5_TCON_INIT (TIMER5_T5PS_INIT + TIMER5_T5M_INIT + TIMER5_TR5_INIT + TIMER5_EXEN5_INIT) +#define TIMER5_TCON1_INIT (TIMER5_CAPM_INIT) +#define PWM0_PWM0EN_INIT (PWM0EN_FLT0_MODE_INIT + PWM0EN_EFLT0_INIT + PWM0EN_PWM0M_INIT + PWM0EN_PWM01_OEN_INIT \ + + PWM0EN_PWM0_OEN_INIT+ PWM0EN_PWM0_EN_INIT ) +#define PWM0_PWM0C_INIT (PWM0C_PWM0IE_INIT + PWM0C_FLT0C_INIT + PWM0C_PWM0S_INIT + PWM0C_CK0_INIT ) + +#define PWM1_PWM1EN_INIT (PWM1EN_FLT0_MODE_INIT + PWM1EN_EFLT0_INIT + PWM1EN_PWM1M_INIT + PWM1EN_PWM11_OEN_INIT \ + + PWM1EN_PWM1_OEN_INIT+ PWM1EN_PWM1_EN_INIT ) +#define PWM1_PWM1C_INIT (PWM1C_PWM1IE_INIT + PWM1C_FLT0C_INIT + PWM1C_PWM1S_INIT + PWM1C_CK0_INIT ) + +#define PWM2_PWM2EN_INIT (PWM2EN_FLT0_MODE_INIT + PWM2EN_EFLT0_INIT + PWM2EN_PWM2M_INIT + PWM2EN_PWM21_OEN_INIT \ + + PWM2EN_PWM2_OEN_INIT+ PWM2EN_PWM2_EN_INIT ) +#define PWM2_PWM2C_INIT (PWM2C_PWM2IE_INIT + PWM2C_FLT0C_INIT + PWM2C_PWM2S_INIT + PWM2C_CK0_INIT ) + +#define PWM3_PWM3C_INIT (PWM3C_PWM3IE_INIT + PWM3C_PWM3EN_INIT + PWM3C_PWM3OEN_INIT + PWM3C_PWM3S_INIT + PWM3C_PTCK3_INIT) + +#define ADC_ADCC0_INIT (ADCC0_ADCEN_INIT + ADCC0_ADCST_INIT + ADCC0_VREFO_INIT + ADCC0_VREFS_INIT + ADCC0_INREF_S_INIT) +#define ADC_ADCC1_INIT (ADCC1_INIT) +#define ADC_ADCC2_INIT (ADCC2_ADCL_ALIGN_INIT + ADCC2_ADCTS_INIT + ADCC2_ADCS_INIT) + +#define ADC_ADCWC_INIT (ADCWC_AMWEN_INIT) + +#define UART1_SCON_INIT (UART1_REN_INIT) + +#if UART1_MODEL0_ENABLE +#define UART1_MODEL0_SCON2_INIT (UART1_MODEL0_UX6_INIT) +#elif UART1_MODEL1_ENABLE +#define UART1_MODEL1_SCON2_INIT (UART1_MODEL1_SM2_INIT + 0X02) +#elif UART1_MODEL2_ENABLE +#define UART1_MODEL2_SCON2_INIT (UART1_MODEL2_SMOD_INIT + UART1_MODEL2_SM2_INIT +0X04 ) +#elif UART1_MODEL3_ENABLE +#define UART1_MODEL3_SCON2_INIT (UART1_MODEL3_SM2_INIT + 0X06 ) +#endif + + + +/* +********************************************************************************************************* +* +********************************************************************************************************* +*/ +void System_Init(void); + +#endif // HC89S_CONFIG_H_ + + diff --git a/app/IAP.c b/app/IAP.c new file mode 100644 index 0000000..7a6c774 --- /dev/null +++ b/app/IAP.c @@ -0,0 +1,133 @@ +/* + * IAP.c + * + * Created on: 20220312 + * Author: User + */ + +/* Includes ------------------------------------------------------------------*/ +#include + +uint8_t EEPROM_Array[4] = {0}; //¶ȵ +uint16_t Save_Value1; +uint16_t Save_Value2; +static uint8_t Flash_ReadData(uint16_t); //һֽ +static void FLASH_WriteData(uint8_t, uint16_t); //дһֽ(д֮ǰҪȲ) +static void Flash_EraseBlock(uint16_t); // +static void Get_TempValue(void); //ָ¶ +static void Save_TempValue(void); +static void Flash_ReadArr(unsigned int fui_Address, unsigned char fuc_Length, unsigned char *fucp_SaveArr); +static void Flash_WriteArr(unsigned int fui_Address, unsigned char fuc_Length, unsigned char *fucp_SaveArr); + +/* Public variables-----------------------------------------------------------*/ +IAP_t xdata IAP = + { + EEPROM_Array, + Save_TempValue, + Get_TempValue}; + +/* + * @name Get_TempValue + * @brief ȡ¶ȵֵ + * @param None + * @retval None + */ +static void Get_TempValue(void) +{ + Flash_ReadArr(EEPROM_Array_ADDR, 4, EEPROM_Array); + Public.Setting_Temp1 = EEPROM_Array[0]; + Public.Setting_Temp1 <<= 8; + Public.Setting_Temp1 |= EEPROM_Array[1]; + Public.Setting_Temp2 = EEPROM_Array[2]; + Public.Setting_Temp2 <<= 8; + Public.Setting_Temp2 |= EEPROM_Array[3]; + Save_Value1 = Public.Setting_Temp1; + Save_Value2 = Public.Setting_Temp2; +} +/* + * @name Save_TempValue + * @brief ¶ȵֵ + * @param None + * @retval None + */ +static void Save_TempValue(void) +{ + if ((Save_Value1 != Public.Setting_Temp1) || (Save_Value2 != Public.Setting_Temp2)) + { + + IAP.EEPROM_Array[0] = (Public.Setting_Temp1 >> 8) & 0xFF; + IAP.EEPROM_Array[1] = Public.Setting_Temp1 & 0xFF; + IAP.EEPROM_Array[2] = (Public.Setting_Temp2 >> 8) & 0xFF; + IAP.EEPROM_Array[3] = Public.Setting_Temp2 & 0xFF; + Flash_EraseBlock(EEPROM_Array_ADDR); + Flash_WriteArr(EEPROM_Array_ADDR, 4, EEPROM_Array); + } +} + +/* + * @name FLASH_WriteData + * @brief дһֽ(д֮ǰҪȲ) + * @param None + * @retval None + */ +static void FLASH_WriteData(uint8_t dat, uint16_t addr) +{ + EA = 0; //رж + INSCON = 0x80; //òΪEEPROM + IAP_DATA = dat; + IAP_CMD = 0xF00F; // Flash + IAP_ADDR = addr; + IAP_CMD = 0xB44B; //ֽڱ + IAP_CMD = 0xE11E; //һβ Զ + INSCON = 0x00; //رдEEPROM + EA = 1; +} + +/* + * @name Flash_EraseBlock + * @brief (ÿΪ32ֽ) + * @param None + * @retval None + */ +static void Flash_EraseBlock(uint16_t addr) +{ + EA = 0; //رж + INSCON = 0x80; //òΪEEPROM + IAP_CMD = 0xF00F; // Flash + IAP_ADDR = addr; //дַ + IAP_CMD = 0xD22D; //ѡʽ + IAP_CMD = 0xE11E; //IAP_ADDRL&IAP_ADDRHָ0xFF,ͬʱԶ + INSCON = 0x00; //رEEPROM + EA = 1; +} +/* + * @name Flash_WriteArr + * @brief дһ + * @param address len savearray + * @retval None + */ +static void Flash_WriteArr(unsigned int fui_Address, unsigned char fuc_Length, unsigned char *fucp_SaveArr) +{ + unsigned char fui_i = 0; + EA = 0; + for (fui_i = 0; fui_i < fuc_Length; fui_i++) + { + FLASH_WriteData(*(fucp_SaveArr++), fui_Address++); + } + EA = 1; +} +/* + * @name Flash_ReadArr + * @brief һ + * @param address len savearray + * @retval None + */ +static void Flash_ReadArr(unsigned int fui_Address, unsigned char fuc_Length, unsigned char *fucp_SaveArr) +{ + INSCON = 0x80; + while (fuc_Length--) + *(fucp_SaveArr++) = *((unsigned char code *)(fui_Address++)); //ȡ +} +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/IAP.h b/app/IAP.h new file mode 100644 index 0000000..d1bd0d1 --- /dev/null +++ b/app/IAP.h @@ -0,0 +1,33 @@ +/* + * IAP.h + * + * Created on: 20220312 + * Author: User + */ +#ifndef __IAP_H__ +#define __IAP_H__ + +/* define ------------------------------------------------------------------*/ +#define EEPROM_Array_ADDR (uint16_t)0x0000 //ͨ1¶ֵַ + + +#define IAP_CNT (uint8_t)10 + +//ö + +//ṹ +typedef struct +{ + + uint8_t *EEPROM_Array; // + void (*Save_TempValue)(void); //¶ȵֵ + void (*Get_TempValue)(void); //ȡ¶ +} IAP_t; + +/* extern variables-----------------------------------------------------------*/ +extern IAP_t xdata IAP; + +#endif +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/IIC.c b/app/IIC.c new file mode 100644 index 0000000..6a918be --- /dev/null +++ b/app/IIC.c @@ -0,0 +1,109 @@ +/* + * IIC.c + * + * Created on: 20220312 + * Author: User + */ + +#include + +static void Start1(void); +static void Write1(uint8_t Data); +static void ACK1(void); +static void Stop1(void); +static void Delay2us(uint8_t); //@16.000MHz 2us + +IIC_t IIC_1 = { + Start1, + Write1, + ACK1, + Stop1}; + + +/* + * @name Start1 + * @brief IIC1 + * @param None + * @retval None + */ +static void Start1(void) +{ + SCL_1 = HIGH; + SDA_1 = HIGH; + Delay2us(1); //@16.000MHz // 2΢ʱ + SDA_1 = LOW; //ʱ߸ߵƽ Ϊ俪ʼ +} + +/* + * @name Write1 + * @brief IIC1д + * @param Data + * @retval None + */ +static void Write1(uint8_t Data) +{ + uint8_t i = 0; + + SCL_1 = LOW; //ʱ ݿԱ仯 + Delay2us(1); // 1΢ʱ + for (i = 0; i < 8; i++) + { + if (Data & 0x80) + SDA_1 = HIGH; + else + SDA_1 = LOW; + + Delay2us(1); // 1΢ʱ + SCL_1 = LOW; + Delay2us(1); // 1΢ʱ + SCL_1 = HIGH; + Delay2us(1); // 1΢ʱ + SCL_1 = LOW; + Data <<= 1; + } +} + +/* + * @name ACK1 + * @brief IIC1Ӧ + * @param None + * @retval None + */ +static void ACK1(void) +{ + static uint8_t timeout = 1; + SCL_1 = 1; + Delay2us(1); + SCL_1 = 0; + Delay2us(1); + while ((SDA_1) && (timeout <= 200)) + { + timeout++; + } + SCL_1 = 0; +} +/* + * @name Stop1 + * @brief IIC1ֹͣ + * @param None + * @retval None + */ +static void Stop1(void) +{ + SCL_1 = 1; + SDA_1 = 0; + Delay2us(1); + SDA_1 = 1; //ʱ߸ߵƽʱ Ϊֹͣź +} + +/* + * @name Delay2us + * @brief ʱ2uS + * @param None + * @retval None + */ +static void Delay2us(uint8_t fui_i) //@16.000MHz 2us +{ +// uint8_t fui_i =1; + while(fui_i--); +} diff --git a/app/IIC.h b/app/IIC.h new file mode 100644 index 0000000..6ad4950 --- /dev/null +++ b/app/IIC.h @@ -0,0 +1,29 @@ +/* + * IIC.h + * + * Created on: 20220312 + * Author: User + */ +#ifndef __IIC_H +#define __IIC_H + +#include + +#define SCL_1 P0_2 +#define SDA_1 P0_1 + +#define HIGH 1 +#define LOW 0 + +typedef struct // IIC ṹ +{ + void (*start)(void); // + void (*write)(uint8_t); //д + void (*ACK)(void); //Ӧ + void (*stop)(void); //ֹͣ +} IIC_t; + +extern IIC_t IIC_1; + + +#endif diff --git a/app/Main.c b/app/Main.c new file mode 100644 index 0000000..86d4cec --- /dev/null +++ b/app/Main.c @@ -0,0 +1,79 @@ + + +#define ALLOCATE_EXTERN + +#include + +uint8_t Channel1_Error_Flag = 0; +uint8_t Channel2_Error_Flag = 0; +void main() +{ + Sys.Init(); + + while (1) + { + UART1.Protocol_Analy(); //Э + if (Public.Channel1_StatusFlag == FALSE) //жͨ1Ƿر + { + PWM.PWM1_HeatingSetting(0); //رռͨ1 + Timer0.Error1_Timer = 0; //Ӳʱ ʼʱ + } + else + { + + if ((ADC.Display_Temp1_Value == 0) && (Timer0.Error1_Timer >= 2)) //ȴ ¶Ȼ Ϊ¶ȴ1 + { + Channel1_Error_Flag = System_Fault; //ͨ1¶ȴ + // PWM.Heating_Flag1 = System_Fault; + } + else + { + Channel1_Error_Flag = FALSE; + } + } + + if (Public.Channel2_StatusFlag == FALSE) //жͨ2Ƿر + { + PWM.PWM2_HeatingSetting(0); //رռͨ2 + Timer0.Error2_Timer = 0; //Ӳʱ ʼʱ + } + else + { + if ((Timer0.Error2_Timer >= 2) && (ADC.Display_Temp2_Value == 0)) //ȴ ¶Ȼ Ϊ¶ȴ2 + { + Channel2_Error_Flag = System_Fault; //ͨ2¶ȴ + // PWM.Heating_Flag2 = System_Fault; + } + else + { + Channel2_Error_Flag = FALSE; + } + } + + if ((Public.Channel1_StatusFlag == FALSE) && (Public.Channel2_StatusFlag == FALSE)) //жǷ񶼹ر + { + FAN_PIN = LOW; //رշ + } + else + { + FAN_PIN = HIGH; //򿪷 + } + + ADC.Get_ADCData(); //ȡADֵת¶ֵ + + if (Timer0.TM1650_Flag == 0) + { + + TM1650_Display(&IIC_1, Public.Setting_Temp1, 1); //ʾͨ1 + } + else + { + + TM1650_Display(&IIC_1, Public.Setting_Temp2, 2); //ʾͨ2 + } + + WDTC |= 0x10; //ιŹ + + // } + } +} diff --git a/app/Main.h b/app/Main.h new file mode 100644 index 0000000..a72d572 --- /dev/null +++ b/app/Main.h @@ -0,0 +1,43 @@ +/* + * main.h + * + * Created on: 20220312 + * Author: User + */ +#ifndef __MAIN_H_ +#define __MAIN_H_ + + +#include "HC89S003AF4.h" +#include +#include + +#include +#include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + + + + + + + +#define FAN_PIN P2_6 + + +extern uint8_t Channel1_Error_Flag; +extern uint8_t Channel2_Error_Flag; + + + + +#endif diff --git a/app/PID.c b/app/PID.c new file mode 100644 index 0000000..b76e9be --- /dev/null +++ b/app/PID.c @@ -0,0 +1,80 @@ +/* + * PID.c + * + * Created on: 20220322 + * Author: User + */ + +#include + +#define kp 13.2 // +#define ki 0.067 // +#define kd 35 //΢ + +//#define pidtime 6 // pid= pidtime * 50ms300ms6675޷ +#define iloss 30 //ֵַ˫ + +sint16_t xdata ek1[2]; // ek0ǰek1ϴ +sint16_t xdata uk1; // pidֵ[0100] +sint16_t xdata iek1; //֣ʽ + +sint16_t xdata ek2[2]; // ek0ǰek1ϴ +sint16_t xdata uk2; // pidֵ[0100] +sint16_t xdata iek2; //֣ʽ + +static void Init(void); +static uint8_t Realize(uint8_t CHANNEL, uint16_t temp_val); + +PID_t xdata PID_Func = { + Init, + Realize}; + +static void Init(void) +{ + ek1[0] = 0; + ek1[1] = 0; + uk1 = 0; + iek1 = 0; + + ek2[0] = 0; + ek2[1] = 0; + uk2 = 0; + iek2 = 0; +} + +/** + * @brief PID㷨ʵ + * @param CHANNEL ͨ Temp_Setting Ŀֵ + * @note + * @retval ͨPID + */ +static uint8_t Realize(uint8_t CHANNEL, uint16_t Temp_Setting) +{ + if (CHANNEL == Temp1_CHANNEL) + { + ek1[1] = ek1[0]; + ek1[0] = Temp_Setting - ADC.Temp1_Result; //㱾ƫ + if (ek1[0] > (-iloss) && ek1[0] < iloss) //ַ + iek1 += ek1[0]; + uk1 = ek1[0] * kp + iek1 * ki + (ek1[0] - ek1[1]) * kd; // PID + if (uk1 <= 0) + uk1 = 0; + if (uk1 >= 100) + uk1 = 100; + return uk1; + } + else if (CHANNEL == Temp2_CHANNEL) //ͨ2 + { + ek2[1] = ek2[0]; + ek2[0] = Temp_Setting - ADC.Temp2_Result; //㱾ƫ + if (ek2[0] > (-iloss) && ek2[0] < iloss) //ַ + iek2 += ek2[0]; + uk2 = ek2[0] * kp + iek2 * ki + (ek2[0] - ek2[1]) * kd; // PID + if (uk2 <= 0) + uk2 = 0; + if (uk2 >= 100) + uk2 = 100; + return uk2; + } + return FALSE; +} diff --git a/app/PID.h b/app/PID.h new file mode 100644 index 0000000..bf0bb85 --- /dev/null +++ b/app/PID.h @@ -0,0 +1,41 @@ +/* + * PID.h + * + * Created on: 20220322 + * Author: User + */ + + + + + + + +typedef struct +{ + + void (*Init)(void); + uint8_t(*Realize)(uint8_t,uint16_t); +} PID_t; + +// typedef struct +// { +// int target_val; //Ŀֵ +// int actual_val; //ʵֵ +// int err; //嵱ǰƫֵ +// int err_next; //һƫֵ +// int err_last; //һƫֵ +// uint8_t kp,ki,kd; //֣΢ϵ +// }_pid; + + + + + + + + + extern PID_t xdata PID_Func; + + + diff --git a/app/PWM.c b/app/PWM.c new file mode 100644 index 0000000..9bc95d7 --- /dev/null +++ b/app/PWM.c @@ -0,0 +1,147 @@ +/* + * PWM.c + * + * Created on: 20220312 + * Author: User + */ + +/* Includes ------------------------------------------------------------------*/ +#include + +/* Private define-------------------------------------------------------------*/ +#define CCP_S1 BIT5 +#define CCP_S0 BIT4 + +#define EPC0H BIT1 +#define EPC0L BIT0 + +/* Private variables----------------------------------------------------------*/ + +/* Private function prototypes------------------------------------------------*/ +static void PWM_Init(void); // PWMʼ +static void PWM1_HeatingSetting(uint8_t Percent); //ͨ1ü +static void PWM2_HeatingSetting(uint8_t Percent); //ͨ2ü +/* Public variables-----------------------------------------------------------*/ +PWM_t PWM = + {0, + 0, + PWM_Init, + PWM1_HeatingSetting, + PWM2_HeatingSetting}; + +/* + * @name PWM_Init + * @brief PWMʼ + * @param None + * @retval None + */ +static void PWM_Init() +{ + PWM0_MAP = 0x22; // PWM0ͨӳP22 + PWM01_MAP = 0x23; // PWM01ͨӳP23 + PWM0C = 0x01; // PWM0Ч PWM01Ч ʱ8Ƶ + + //ģʽ£PWM0PWM01һڼĴ + // PWM0ռձȵʹ PWM0ռձȼĴ + // PWM01ռձȵʹ PWM0Ĵ + + //ڼ = 0x03ff / (Fosc / PWMƵϵ) + // = 0x03ff / (16000000 / 8) + // = 1023 /2000000 + // = 511.5us Լ1.955kHz + + PWM0PH = 0x03; //ڸ4λΪ0x03 + PWM0PL = 0xE7; //ڵ8λΪ0xFF + + //ռձȼ= 0x0155 / (Fosc / PWMƵϵ) FoscϵͳʱõIJ֣ + // = 0x0155 / (16000000 / 8) + // = 341 / 2000000 + // = 170.5us ռձΪ 170.5/511.5 = 33.3% + PWM0DH = 0x00; // PWM04λռձ + PWM0DL = 0x00; // PWM04λռձ + PWM0DTH = 0x00; // PWM014λռձ + PWM0DTL = 0x00; // PWM018λռձ + PWM0EN = 0x0F; //ʹPWM0 ڶģʽ +} + +/* + * @name PWM1_HeatingSetting + * @brief ȹ + * @param None + * @retval None + */ +static void PWM1_HeatingSetting(uint8_t Percent) +{ + uint16_t Temp_Value = 0; + Temp_Value = Percent * 10; + if (Public.Channel1_StatusFlag != FALSE) + { + + if (Channel1_Error_Flag != System_Fault) //жǷ + { + + if (Percent == 0) + { + PWM.Heating_Flag1 = System_Complete;//¶Ѿ + } + else + { + PWM.Heating_Flag1 = TRUE; //ڼ + } + } + else + { + PWM.Heating_Flag1 = System_Fault; + } + + } + else + { + PWM.Heating_Flag1 = FALSE; + } + + PWM0DTH = (Temp_Value >> 8) & 0xFF; + PWM0DTL = (Temp_Value & 0xFF); +} + +/* + * @name PWM2_HeatingSetting + * @brief ȹ + * @param None + * @retval None + */ +static void PWM2_HeatingSetting(uint8_t Percent) +{ + uint16_t Temp_Value = 0; + Temp_Value = Percent * 10; + if (Public.Channel2_StatusFlag != FALSE) + { + + if (Channel2_Error_Flag != System_Fault) //жǷ + { + if (Percent == 0) + { + PWM.Heating_Flag2 = System_Complete; //¶Ѿ + } + else + { + PWM.Heating_Flag2 = TRUE; //ڼ + } + } + else + { + PWM.Heating_Flag2 = System_Fault; + } + + } + else + { + PWM.Heating_Flag2 = FALSE; + } + + PWM0DH = (Temp_Value >> 8) & 0xFF; + PWM0DL = (Temp_Value & 0xFF); +} +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/PWM.h b/app/PWM.h new file mode 100644 index 0000000..79d4413 --- /dev/null +++ b/app/PWM.h @@ -0,0 +1,37 @@ +#ifndef __PWM_H__ +#define __PWM_H__ + +/* + * PWM.h + * + * Created on: 20220312 + * Author: User + */ +//ö +typedef enum +{ + Duty_0 = (uint8_t)0, + Duty_20 = (uint8_t)20, + Duty_40 = (uint8_t)40, + Duty_60 = (uint8_t)60, + Duty_80 = (uint8_t)80, + Duty_100 = (uint8_t)100, +}PWM_Value_t; + +//ṹ +typedef struct +{ + uint8_t Heating_Flag1; + uint8_t Heating_Flag2; + void (*PWM_Init)(void); //PWMʼ + void (*PWM1_HeatingSetting)(uint8_t Percent); //üȰٷֱ Χ 0~100 + void (*PWM2_HeatingSetting)(uint8_t Percent); //üȰٷֱ Χ 0~100 +} PWM_t; + +/* extern variables-----------------------------------------------------------*/ +extern PWM_t PWM; + +#endif +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/Protocol.c b/app/Protocol.c new file mode 100644 index 0000000..6265b4d --- /dev/null +++ b/app/Protocol.c @@ -0,0 +1,129 @@ +/* + * Protocol.c + * + * Created on: 20220312 + * Author: User + */ + +#include + +void Analysis(UART_t *UART); //Э鴦 +void Send(uint8_t func); //ݷ + +uint8_t Sum_Check(uint8_t *arr, uint8_t Len); //У + +Protocol_t xdata Protocol = { + Analysis, + Send}; + +/* Э鳤Ϊ10 ͷ֡ 0A ڶ֡ λ ֡ Чݳλ м6λΪЧλ β֡ΪУλ + λ01ΪĴ 02ΪдĴ + мλЧλǰλΪͨ1 һλΪ״̬λ0x00ر 0x01ڼ 0x02¶ȴﵽ + ڶλΪ¶λ λΪͨ2 ״̬λԼ¶λ +ӣ0A 01 06 00 00 00 00 00 00 66 +*/ +/* + * @name Analysis + * @brief Э + * @param UART_t + * @retval None + */ +void Analysis(UART_t *UART) +{ + UART_t *const com = UART; + uint8_t sum_check = 0, Data_Len = 0; + if (UART1.ucRec_Flag == TRUE) //֤յ + { + + sum_check = Sum_Check(UART1.pucRec_Buffer, Protocol_Len); //Уֵ + Data_Len = UART1.pucRec_Buffer[2]; //ȡݳ + if ((UART1.pucRec_Buffer[0] == 0x0A) && (UART1.pucRec_Buffer[Data_Len + 3] == sum_check)) //УЭ + { + + if (UART1.pucRec_Buffer[1] == Register_Read) //Ĵֵ + { + Send(Register_Read); //ͷ + } + else if (UART1.pucRec_Buffer[1] == Register_Write) //дĴķֵ + { + + Public.Channel1_StatusFlag = UART1.pucRec_Buffer[3]; //ȡͨ1״̬ + PWM.Heating_Flag1 = Public.Channel1_StatusFlag; + Public.Setting_Temp1 = UART1.pucRec_Buffer[4]; //ȡͨ1¶ + Public.Setting_Temp1 = Public.Setting_Temp1 << 8; + Public.Setting_Temp1 |= UART1.pucRec_Buffer[5]; //ȡͨ1¶ + Public.Channel2_StatusFlag = UART1.pucRec_Buffer[6]; //ȡͨ2״̬ + PWM.Heating_Flag2 = Public.Channel2_StatusFlag; + Public.Setting_Temp2 = UART1.pucRec_Buffer[7]; //ȡͨ2¶ + Public.Setting_Temp2 = Public.Setting_Temp2 << 8; + Public.Setting_Temp2 |= UART1.pucRec_Buffer[8]; //ȡͨ2¶ + IAP.Save_TempValue(); //¶ȱ浽EEPROM + Send(Register_Write); //ͷ + } + else if (UART1.pucRec_Buffer[1] == Setting_Reg_Read) //ȡ¶ֵ + { + Send(Setting_Reg_Read); + } + } + + Public.Memory_Clr(UART1.pucRec_Buffer, Protocol_Len); // + UART1.ucRec_Flag = FALSE; //رմڽɱ־λ + } +} +/* + * @name Send + * @brief ڷݺ + * @param func + * @retval None + */ +void Send(uint8_t func) +{ + UART1.pucSend_Buffer[0] = 0x0A; //ͷ֡ + UART1.pucSend_Buffer[1] = func; //λ + UART1.pucSend_Buffer[2] = 0x06; //Чλ + if (func == Register_Read) + { + UART1.pucSend_Buffer[3] = PWM.Heating_Flag1; //ͨ1ıʶ + UART1.pucSend_Buffer[4] = (ADC.Display_Temp1_Value >> 8) & 0xFF; //ͨ1ʵʱ¶ + UART1.pucSend_Buffer[5] = ADC.Display_Temp1_Value & 0xFF; + UART1.pucSend_Buffer[6] = PWM.Heating_Flag2; //ͨ2״̬ + UART1.pucSend_Buffer[7] = (ADC.Display_Temp2_Value >> 8) & 0xFF; //ͨ2ʵʱ¶ + UART1.pucSend_Buffer[8] = ADC.Display_Temp2_Value & 0xFF; + } + else + { + UART1.pucSend_Buffer[3] = Public.Channel1_StatusFlag;; //ͨ1ıʶ + UART1.pucSend_Buffer[4] = (Public.Setting_Temp1 >> 8) & 0xFF; //ͨ1ʵʱ¶ + UART1.pucSend_Buffer[5] = Public.Setting_Temp1 & 0xFF; + UART1.pucSend_Buffer[6] = Public.Channel2_StatusFlag; //ͨ2״̬ + UART1.pucSend_Buffer[7] = (Public.Setting_Temp2 >> 8) & 0xFF; //ͨ2ʵʱ¶ + UART1.pucSend_Buffer[8] = Public.Setting_Temp2 & 0xFF; + } + + UART1.pucSend_Buffer[9] = Sum_Check(UART1.pucSend_Buffer, Protocol_Len); //ǰ9λͼֵ + UART1.UART_SendArray(UART1.pucSend_Buffer, Protocol_Len); //ͷֵ +} +/* + * @name Sum_Check + * @brief У麯 + * @param *arr Len + * @retval None + * ۼӺchecksumУ㷨ͬܲòͬ㷨㷨ϸ΢ + * üۼӺͼ㷽ʮƴ8λзָԸ8λֵۼӣУͣ + * У͵ֵʮƵFFҲ255Ҫ䲹ΪУ + */ +uint8_t Sum_Check(uint8_t *arr, uint8_t Len) //У麯 +{ + uint8_t i = 0; + uint16_t Sum = 0; + for (i = 0; i < (Len - 1); i++) + { + Sum += *(arr + i); + } + if (Sum > 0xFF) //255 + { + Sum = (~(Sum & 0xFF)) + 1; + } + + return Sum & 0xFF; +} diff --git a/app/Protocol.h b/app/Protocol.h new file mode 100644 index 0000000..5efe3e2 --- /dev/null +++ b/app/Protocol.h @@ -0,0 +1,39 @@ +/* + * Protocol.h + * + * Created on: 20220312 + * Author: User + */ +#include + + +#define Register_Read 0x01 //Ĵ +#define Register_Write 0x02 //дĴ +#define Setting_Reg_Read 0x03 //üĴĴ +#define Protocol_Len 0x0A //Эݳ + + +typedef struct +{ + void (*Analysis)(UART_t *); + void (*Send)(uint8_t); + +}Protocol_t; + + + + + +extern Protocol_t xdata Protocol; + + + + + + + + + + + + diff --git a/app/Public.c b/app/Public.c new file mode 100644 index 0000000..c412c69 --- /dev/null +++ b/app/Public.c @@ -0,0 +1,110 @@ +/* + * Public.c + * + * Created on: 20220312 + * Author: User + */ + +/* Includes ------------------------------------------------------------------*/ +#include + +/* Private define-------------------------------------------------------------*/ + +/* Private variables----------------------------------------------------------*/ +static void Delay_us(uint16_t); // usʱ +static void Delay_ms(uint16_t); // msʱ +static void Memory_Clr(uint8_t *, uint16_t); //ڴ +static void Error_Handler(void); // +static void Sys_Soft_Reset(void); //ϵͳλ + +/* Public variables-----------------------------------------------------------*/ +Public_t idata Public = + { + 0, + 0, + 0, + 0, + Delay_us, + Delay_ms, + Memory_Clr, + Error_Handler, + Sys_Soft_Reset}; + +/* Private function prototypes------------------------------------------------*/ + +/* + * @name Delay_ms + * @brief ʱ + * @param ms -> Ҫʱʱ + * @retval None + */ +static void Delay_ms(uint16_t fui_i) //@16MHz +{ + uint16_t fui_j; + for (; fui_i > 0; fui_i--) + for (fui_j = 1596; fui_j > 0; fui_j--) + ; +} + +/* + * @name Delay_us + * @brief ΢ʱ + * @param us -> Ҫʱʱ + * @retval None + */ +static void Delay_us(uint16_t us) //@22.1184MHz +{ + uint8_t i; + while (us--) + { + + i = 3; + while (--i) + ; + } +} + +/* + * @name Memory_Set + * @brief ڴ + * @param pucBuffer -> ڴ׵ַ + LEN -> ڴ泤 + * @retval None +*/ +static void Memory_Clr(uint8_t *pucBuffer, uint16_t LEN) +{ + uint16_t i; + + for (i = 0; i < LEN; i++) + { + *(pucBuffer + i) = (uint8_t)0; + } +} + +/* + * @name Error_Handler + * @brief + * @param None + * @retval None + */ +static void Error_Handler() +{ +} + +/* + * @name Sys_Soft_Reset + * @brief ϵͳλ + * @param None + * @retval None + */ +static void Sys_Soft_Reset(void) +{ +// #ifdef Monitor_Run_Code +// printf("System soft reset!\r\n\r\n"); +// #endif + +// IAP_CONTR = 0x20; +} +/******************************************************** + End Of File +********************************************************/ diff --git a/app/Public.h b/app/Public.h new file mode 100644 index 0000000..7b39b70 --- /dev/null +++ b/app/Public.h @@ -0,0 +1,74 @@ +/* + * Public.h + * + * Created on: 20220312 + * Author: User + */ + +#ifndef __PUBLIC_H_ +#define __PUBLIC_H_ + + +#define FALSE 0 +#define TRUE 1 + +#define HIGH 1 +#define LOW 0 +//ض +typedef signed char sint8_t; +typedef signed short int sint16_t; +typedef signed long int sint32_t; + +typedef unsigned char uint8_t; +typedef unsigned short int uint16_t; +typedef unsigned long int uint32_t; + +//ö -> BITλ +typedef enum +{ + BIT0 = (uint8_t)(0x01 << 0), + BIT1 = (uint8_t)(0x01 << 1), + BIT2 = (uint8_t)(0x01 << 2), + BIT3 = (uint8_t)(0x01 << 3), + BIT4 = (uint8_t)(0x01 << 4), + BIT5 = (uint8_t)(0x01 << 5), + BIT6 = (uint8_t)(0x01 << 6), + BIT7 = (uint8_t)(0x01 << 7), +}BIT_t; + +//ö ϵͳ״̬ +typedef enum +{ + System_Stop = (uint8_t)0, //ϵͳֹͣ + System_Heating = (uint8_t)1, // + System_Complete = (uint8_t)2, //¶ȴﵽ + System_Fault = (uint8_t)3, //ϵͳ +} Sys_Status_t; + + + +//ṹ +typedef struct +{ + uint8_t Channel1_StatusFlag; + uint8_t Channel2_StatusFlag; + uint16_t Setting_Temp1; + uint16_t Setting_Temp2; + void (*Delau_us)(uint16_t); //usʱ + void (*Delay_ms)(uint16_t); //msʱ + void (*Memory_Clr)(uint8_t*,uint16_t); //ڴ + void (*Error_Handler)(void); // + void (*Sys_Soft_Reset)(void); //ϵͳλ +} Public_t; + +/* extern variables-----------------------------------------------------------*/ +extern Public_t idata Public; + +/*******Ԥ궨*******/ +#define Monitor_Run_Code //м +//#define Hardware_TEST //Ӳ + +#endif +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/Sys_init.c b/app/Sys_init.c new file mode 100644 index 0000000..1b3215d --- /dev/null +++ b/app/Sys_init.c @@ -0,0 +1,35 @@ +/* + * Sys_init.c + * + * Created on: 20220312 + * Author: User + */ + +#include +extern System_Init(); //ⲿ +static void Init(void); //ʼ + +Sys_init_t Sys = { + Init}; + +/* + * @name Init + * @brief ϵͳʼ + * @param None + * @retval None + */ + +static void Init(void) +{ + // WDTCCR = 0x00; //رտŹ + System_Init(); //ʱԼųʼ ļ + Timer0.Timer0_Init(); //ʱ0ʼ + Timer3.Timer3_Init(); //ʱ3ʼ + PWM.PWM_Init(); // PWMʼ + ADC.Init(); // ADCʼ + UART1.UART_Init(); //1ʼ + TM1650.Init(); // 1650ʼ + PID_Func.Init(); // pidʼ + IAP.Get_TempValue(); //ȡ洢¶ֵ + FAN_PIN = LOW; //ϵĬϹرշ +} diff --git a/app/Sys_init.h b/app/Sys_init.h new file mode 100644 index 0000000..df5afd8 --- /dev/null +++ b/app/Sys_init.h @@ -0,0 +1,24 @@ +/* + * Sys_init.h + * + * Created on: 20220312 + * Author: User + */ +#ifndef __SYS_INIT_H +#define __SYS_INIT_H + + +typedef struct +{ + + void(*Init)(void); //ϵͳʼ + +}Sys_init_t; + + + +extern Sys_init_t Sys; + + +#endif + diff --git a/app/TM1650.c b/app/TM1650.c new file mode 100644 index 0000000..8a05c0c --- /dev/null +++ b/app/TM1650.c @@ -0,0 +1,148 @@ +/* + * TM1650.c + * + * Created on: 20220312 + * Author: User + */ + +#include + +// ʾ +static xdata uint8_t tab[] = { + 0x3F, // 0 + 0x06, // 1 + 0x5B, // 2 + 0x4F, // 3 + 0x66, // 4 + 0x6D, // 5 + 0x7D, // 6 + 0x07, // 7 + 0x7F, // 8 + 0x6F, // 9 + 0x40, // 10 = - + 0x79, // 11 = E + 0x50, // 12 = r + 0x00, // 13 = Null + 0x09, // 14 + 0x58, // 15 = c + 0x1c, // 16 = u + 0x63, // 17 = o + 0x39, // 18 = C + 0x5C, // 19 = o + 0x0f, // 20 = C + 0x61, // 21 = c + 0x71, // 22 = F + 0x37, // 23 = N + 0x77, // 24 = A + 0x10, // 25 | + 0x14 // 26 || +}; + +static void Init(void); // tm1650ʼ +static void TM1650_Set(IIC_t *Channel, uint8_t Add, uint8_t Value); //tm1650Ĵֵ + +static void Display_OFF(IIC_t *Channel); //ʾOFF ַ +static void Display_Close(IIC_t *Channel); //ʾʱر + +void TM1650_Display(IIC_t *Channel, uint16_t Value, uint8_t dot); //ʾʹ + +TM1650_t TM1650 = { + 1, + Init, + Display_OFF, + Display_Close}; + +/* + * @name Init + * @brief 1650ʼ + * @param None + * @retval None + */ +static void Init(void) +{ + TM1650_Set(&IIC_1, 0x48, 0x31); //ͨ1 3 ʾ +} + +/* + * @name TM1650_Set + * @brief 1650д + * @param Channel Add Value + * @retval None + */ +static void TM1650_Set(IIC_t *Channel, uint8_t Add, uint8_t Value) +{ + IIC_t *const COM = Channel; + EA = 0; + COM->start(); // iicʼ + COM->write(Add); // iicдܻߵַ + COM->ACK(); //ȴӦź + COM->write(Value); // iicдݻʾ + COM->ACK(); //ȴӦź + COM->stop(); // iicֹͣ + EA = 1; +} + +/* + * @name TM1650_Set + * @brief 1650ʾ + * @param Channel Value CHANNEL + * @retval None + */ +void TM1650_Display(IIC_t *Channel, uint16_t Value, uint8_t CHANNEL) +{ + IIC_t *const IIC = Channel; + + if (CHANNEL == 1) //жʾͨ + { + TM1650_Set(IIC, DIG1, tab[25]); //ʾ| + } + else + { + TM1650_Set(IIC, DIG1, tab[26]); //ʾ|| + } + + if (Value < 100) + { + TM1650_Set(IIC, DIG2, tab[13]); //¶Ȳ100 رλ + } + else + { + TM1650_Set(IIC, DIG2, tab[Value % 1000 / 100]); + } + TM1650_Set(IIC, DIG3, tab[Value % 100 / 10]); + TM1650_Set(IIC, DIG4, tab[Value % 10 / 1]); + + // TM1650_Set(IIC, DIG1, tab[Value / 1000]); + // TM1650_Set(IIC, DIG2, tab[Value / 100 % 10]); + // TM1650_Set(IIC, DIG3, tab[Value / 10 % 10]); + // TM1650_Set(IIC, DIG4, tab[Value / 1 % 10]); +} + +/* + * @name Display_OFF + * @brief TM1650ʾOFF + * @param Channel + * @retval None + */ +static void Display_OFF(IIC_t *Channel) +{ + IIC_t *const IIC = Channel; + TM1650_Set(IIC, DIG1, tab[0]); //һλʾO + TM1650_Set(IIC, DIG2, tab[22]); //ڶλʾF + TM1650_Set(IIC, DIG3, tab[22]); //λʾF + TM1650_Set(IIC, DIG4, tab[13]); //λʾر +} +/* + * @name Display_Close + * @brief 1650ʾر + * @param Channel + * @retval None + */ +static void Display_Close(IIC_t *Channel) +{ + IIC_t *const IIC = Channel; + TM1650_Set(IIC, DIG1, tab[13]); //رʾ + TM1650_Set(IIC, DIG2, tab[13]); //رʾ + TM1650_Set(IIC, DIG3, tab[13]); //رʾ + TM1650_Set(IIC, DIG4, tab[13]); //رʾ +} diff --git a/app/TM1650.h b/app/TM1650.h new file mode 100644 index 0000000..acedc47 --- /dev/null +++ b/app/TM1650.h @@ -0,0 +1,37 @@ +/* + * TM1650.h + * + * Created on: 20220312 + * Author: User + */ + +#ifndef __TM1650_H +#define __TM1650_H +#include + + + + +#define DIG1 0x68 +#define DIG2 0x6A +#define DIG3 0x6C +#define DIG4 0x6E + + +typedef struct +{ + uint8_t Flicker_Flag; //TM1650˸ı־λ + void (*Init)(void); //ʼ + + void (*Display_OFF)(IIC_t*); //ʾoff + void (*Display_Close)(IIC_t*); //ʾر +}TM1650_t; + + + +extern void TM1650_Display(IIC_t *Channel, uint16_t Value,uint8_t CHANNEL); //ʾʹ +extern TM1650_t TM1650; + + +#endif + diff --git a/app/Timer0.c b/app/Timer0.c new file mode 100644 index 0000000..9267f86 --- /dev/null +++ b/app/Timer0.c @@ -0,0 +1,75 @@ +/* + * Timer0.c + * + * Created on: 20220312 + * Author: User + */ +/* Includes ------------------------------------------------------------------*/ +#include + +/* Private define-------------------------------------------------------------*/ + +/* Private variables----------------------------------------------------------*/ + +/* Private function prototypes------------------------------------------------*/ +static void Timer0_Init(void); //ʱ0ʼ + +/* Public variables-----------------------------------------------------------*/ +Timer0_t Timer0 = + {0, //ͨ1ʱ + 0,//ͨ2ʱ + 0, //лʾ־ + 0, //ڷͳʱ + 0, //ڽճʱ + 0, //ʱжϼ + Timer0_Init}; + +/* + * @name Timer0_Init + * @brief ʱ0ʼ + * @param None + * @retval None + */ +static void Timer0_Init() // //1@16MHz +{ + TCON1 = 0x00; // Tx0ʱʱΪFosc + TMOD = 0x00; // 16λװضʱ/ + // // Tim0ʱ = (65536 - 0xFACB) * (1 / (Fosc /TimerƵϵ)) + // // = 1333 / (16000000 / 12) + // // = 1 ms + + // //ʱ1ms + // //Ƴֵ = 65536 - ((1/1000) / (1/(Fosc / TimerƵϵ))) + // // = 65536 - ((1/1000) / (1/(16000000 / 12))) + // // = 65536 - 1333 + // // = 0xFACB + TH0 = 0xFA; + TL0 = 0xCB; // T0ʱʱ1ms + IE |= 0x02; //T0ж + TCON |= 0x10; //ʹT0 + EA = 1; //ж +} + +/* + * @name Timer0_isr() + * @brief ʱ0жϺ(1msжһ) + * @param None + * @retval None + */ +/***********ʱ0жϺ***********/ +void Timer0_isr() interrupt TIMER0_VECTOR +{ + if (++Timer0.usMCU_Run_Timer >= TIMER0_1000mS) + { + Timer0.usMCU_Run_Timer = 0; + Timer0.TM1650_Flag = ~Timer0.TM1650_Flag; + Timer0.Error1_Timer++; + Timer0.Error2_Timer++; + } + Timer0.msDelay_Timer++; //ڽճʱ + Timer0.ADC_Timer++; + +} +/******************************************************** + End Of File +********************************************************/ diff --git a/app/Timer0.h b/app/Timer0.h new file mode 100644 index 0000000..bf9a0f1 --- /dev/null +++ b/app/Timer0.h @@ -0,0 +1,42 @@ +/* + * Timer0.h + * + * Created on: 20220312 + * Author: User + */ + +#ifndef __Timer0_H__ +#define __Timer0_H__ + +//ö +typedef enum +{ + TIMER0_10mS = (uint16_t)10, + TIMER0_50mS = (uint16_t)50, + TIMER0_80mS = (uint16_t)80, + TIMER0_100mS = (uint16_t)100, + TIMER0_200mS = (uint16_t)200, + TIMER0_500mS = (uint16_t)500, + TIMER0_1000mS = (uint16_t)1000, + TIMER0_2000mS = (uint16_t)2000, +} TIMER0_Value_t; + +//ṹ +typedef struct +{ + uint8_t volatile Error1_Timer; //ϵͳʱ + uint8_t volatile Error2_Timer; //ϵͳʱ + uint16_t volatile TM1650_Flag; //лʾ־ + uint16_t volatile msDelay_Timer; // mSʱ + uint16_t volatile ADC_Timer; // ʱ + uint16_t volatile usMCU_Run_Timer; // + void (*Timer0_Init)(void); //ʱ0ʼ +} Timer0_t; + +/* extern variables-----------------------------------------------------------*/ +extern Timer0_t Timer0; + +#endif +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/Timer3.c b/app/Timer3.c new file mode 100644 index 0000000..92d1d08 --- /dev/null +++ b/app/Timer3.c @@ -0,0 +1,62 @@ +/* + * Timer2.c + * + * Created on: 20220312 + * Author: User + */ +/* Includes ------------------------------------------------------------------*/ +#include + +/* Private function prototypes------------------------------------------------*/ +static void Timer3_Init(void); //ʱ0ʼ + +/* Public variables-----------------------------------------------------------*/ +Timer3_t xdata Timer3 = + { + + 0, //ʱ־λ + Timer3_Init}; + +/* + * @name Timer0_Init + * @brief ʱ0ʼ + * @param None + * @retval None + */ +static void Timer3_Init() // 10@16.000MHz +{ + T3CON = 0x20; // Timer3 ʹʱ Fosc/64 Ƶ + TH3 = 0xF6; + TL3 = 0x3C; + ET3 = 1; //򿪶ʱ3ж + EA = 1; //ж + T3CON |= 0x04; //ʱ3 +} + +/* + * @name Timer0_isr() + * @brief ʱ3жϺ(10msжһ) + * @param None + * @retval None + */ +/***********ʱ3жϺ***********/ +void Timer3_isr() interrupt T3_VECTOR +{ + + if (++Timer3.mSDelay_Timer >= TIMER3_300mS) //˸ + { + Timer3.mSDelay_Timer = 0; + if (Public.Channel1_StatusFlag != FALSE) + { + PWM.PWM1_HeatingSetting(PID_Func.Realize(Temp1_CHANNEL, Public.Setting_Temp1)); + } + + if (Public.Channel2_StatusFlag != FALSE) + { + PWM.PWM2_HeatingSetting(PID_Func.Realize(Temp2_CHANNEL, Public.Setting_Temp2)); + } + } +} +/******************************************************** + End Of File +********************************************************/ diff --git a/app/Timer3.h b/app/Timer3.h new file mode 100644 index 0000000..7ece520 --- /dev/null +++ b/app/Timer3.h @@ -0,0 +1,39 @@ +/* + * Timer2.h + * + * Created on: 20220312 + * Author: User + */ +#ifndef __Timer3_H__ +#define __Timer3_H__ + +//ö +typedef enum +{ + + TIMER3_10mS = (uint16_t)1, + TIMER3_50mS = (uint16_t)5, + TIMER3_100mS = (uint16_t)10, + TIMER3_200mS = (uint16_t)20, + TIMER3_300mS = (uint16_t)30, + TIMER3_500mS = (uint16_t)50, + TIMER3_1S = (uint16_t)100, + TIMER3_2S = (uint16_t)200, +} TIMER3_Value_t; + +//ṹ +typedef struct +{ + + uint16_t volatile mSDelay_Timer; //ʱλ + + void (*Timer3_Init)(void); //ʱ0ʼ +} Timer3_t; + +/* extern variables-----------------------------------------------------------*/ +extern Timer3_t xdata Timer3; + +#endif +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/UART.h b/app/UART.h new file mode 100644 index 0000000..534f6e7 --- /dev/null +++ b/app/UART.h @@ -0,0 +1,47 @@ +/* + * UART.h + * + * Created on: 20220312 + * Author: User + */ + + +#ifndef __UART_H_ +#define __UART_H_ + +#include + + + + + + +//첽ڽṹ +typedef struct +{ + + uint8_t volatile ucTX_Busy_Flag; //æµ־ + uint8_t volatile ucRec_Flag; //ձ־λ + uint8_t volatile ucRec_Cnt; //ռ + + uint8_t* pucSend_Buffer; //ͻָ + uint8_t* pucRec_Buffer; //ջָ + + void (*UART_Init)(void); //ڳʼ + void (*UART_SendData)(uint8_t); //ڷַ + void (*UART_SendArray)(uint8_t*,uint16_t); //ڷ + void (*UART_SendString)(uint8_t*); //ڷַ + void (*Protocol_Analy)(void); //ӿЭ + +} UART_t; + +/* extern variables-----------------------------------------------------------*/ + +extern UART_t idata UART1; + +/* extern function prototypes-------------------------------------------------*/ + +#endif +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file diff --git a/app/UART1.c b/app/UART1.c new file mode 100644 index 0000000..c661da6 --- /dev/null +++ b/app/UART1.c @@ -0,0 +1,195 @@ +/* + * UART1.c + * + * Created on: 20220312 + * Author: User + */ + +/* Includes ------------------------------------------------------------------*/ +#include +//#include +/* Private define-------------------------------------------------------------*/ + +#define UART1_Send_LENGTH 10 +#define UART1_Rec_LENGTH 10 + +/* Private variables----------------------------------------------------------*/ + +static uint8_t xdata ucSend_Buffer[UART1_Send_LENGTH] = {0x00}; +static uint8_t xdata ucRec_Buffer[UART1_Rec_LENGTH] = {0x00}; + +/* Private function prototypes------------------------------------------------*/ +static void Init(void); //ڳʼ +static void SendData(uint8_t); //ڷַ +static void SendArray(uint8_t *, uint16_t); //ڷ +static void SendString(uint8_t *); //ڷַ +static void Protocol_Analy(void); //Э + +/* Public variables-----------------------------------------------------------*/ +UART_t idata UART1 = + { + FALSE, + FALSE, + 0, + ucSend_Buffer, + ucRec_Buffer, + Init, + SendData, + SendArray, + SendString, + Protocol_Analy}; + +/* + * @name Init + * @brief 1ʼ + * @param None + * @retval None + */ +static void Init() // 9600bps@16MHz +{ + // P2M0 = P2M0 & 0xF0 | 0x20; // P20Ϊ + // P0M2 = P0M2 & 0x0F | 0x80; // P05Ϊ + TXD_MAP = 0x05; // TXDӳP05 + RXD_MAP = 0x20; // RXDӳP20 + BRTSEL = 0X00; // UART1IJ:00 T4 + T4CON = 0x06; // T4ģʽUART1ʷ + + //ʼ + // = 1/16 * (T4ʱԴƵ / ʱ4ԤƵ) / (65536 - 0xFF98) + // = 1/16 * ((16000000 / 1) / 104) + // = 9615.38(0.16%) + + //9600 + //Ƴֵ = (65536 - ((T4ʱԴƵ / ʱ4ԤƵ) * (1 / 16)) / ) + // = (65536 - (16000000 * (1 / 16) / 9600)) + // = (65536 - 104.167) + // = FF98 + + TH4 = 0xFF; + TL4 = 0x98; //9600 + SCON2 = 0x02; // 8λUARTʿɱ + SCON = 0x10; //н + IE |= 0X10; //ʹܴж + EA = 1; //ʹж +} + +/* + * @name SendData + * @brief ַ + * @param dat:ַ + * @retval None + */ +static void SendData(uint8_t dat) +{ + while (UART1.ucTX_Busy_Flag) + ; //ȴǰݷ + UART1.ucTX_Busy_Flag = TRUE; //λæµ־ + SBUF = dat; //дUARTĴ +} + +/* + * @name SendArray + * @brief ڷ + * @param p_Arr:׵ַLEN:ͳ + * @retval None + */ +static void SendArray(uint8_t *p_Arr, uint16_t LEN) +{ + uint16_t i = 0; + + for (i = 0; i < LEN; i++) + { + UART1.UART_SendData(*(p_Arr + i)); + } + while (UART1.ucTX_Busy_Flag) + ; //ȴݷ +} + +/* + * @name SendString + * @brief ַ + * @param p_Str:ַ + * @retval None +// */ +static void SendString(uint8_t *p_Str) +{ + while (*p_Str) + { + UART1.UART_SendData(*(p_Str++)); //͵ǰַ + } + while (UART1.ucTX_Busy_Flag) + ; //ȴݷ +} + +// putcharַͺض +// extern char putchar(char c) +// { +// UART1.UART_SendData((uint8_t)c); +// return c; +// } + +/* + * @name UART1_isr + * @brief 1жϷ + * @param None + * @retval None + */ +void UART1_isr() interrupt UART1_VECTOR +{ + + if (RI) + { + RI = (bit)0; //жϱ־ + + if (UART1.ucRec_Cnt < UART1_Rec_LENGTH) + { + ucRec_Buffer[UART1.ucRec_Cnt++] = SBUF; + } + + UART1.ucRec_Flag = TRUE; + } + + if (TI) + { + TI = (bit)0; //жϱ־ + UART1.ucTX_Busy_Flag = FALSE; //æµ־ + } +} + +/* + * @name Protocol_Analy + * @brief Э + * @param None + * @retval None + */ + +static void Protocol_Analy(void) +{ + if (UART1.ucRec_Flag == TRUE) + { + //õ + if (ucRec_Buffer[0] != 0) + { + + Timer0.msDelay_Timer = 0; + while (UART1.ucRec_Cnt < Protocol_Len) + { + + if (Timer0.msDelay_Timer >= TIMER0_100mS) // 100msûн ѭ + break; + } + + // Э + Protocol.Analysis(&UART1); //Э鴦 + } + + // + Public.Memory_Clr(ucRec_Buffer, (uint16_t)UART1.ucRec_Cnt); + //½ + UART1.ucRec_Cnt = 0; //ռ + UART1.ucRec_Flag = FALSE; //ձ־λȡ + } +} +/******************************************************** + End Of File +********************************************************/ \ No newline at end of file