stm32: Add support for Nation N32G45x mcus (#6116)
N32G452/G455 are mostly compatible with STM32F103 but have M4 core and different ADC. Signed-off-by: Alexey Golyshin <stas2z@gmail.com>
This commit is contained in:
Alexey
GitHub
@@ -97,6 +97,14 @@ choice
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config MACH_STM32L412
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bool "STM32L412"
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select MACH_STM32L4
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config MACH_N32G452
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bool "Nation N32G452"
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select MACH_N32G45x
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select MACH_STM32F1
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config MACH_N32G455
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bool "Nation N32G455"
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select MACH_N32G45x
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select MACH_STM32F1
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endchoice
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config MACH_STM32F103x6
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@@ -127,10 +135,12 @@ config MACH_STM32F4x5 # F405, F407, F429 series
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bool
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config MACH_STM32L4
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bool
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config MACH_N32G45x
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bool
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config HAVE_STM32_USBFS
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bool
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default y if MACH_STM32F0x2 || MACH_STM32G0Bx || MACH_STM32L4 || MACH_STM32G4
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default y if (MACH_STM32F103 || MACH_STM32F070) && !STM32_CLOCK_REF_INTERNAL
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default y if (MACH_STM32F1 || MACH_STM32F070) && !STM32_CLOCK_REF_INTERNAL
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config HAVE_STM32_USBOTG
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bool
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default y if MACH_STM32F2 || MACH_STM32F4 || MACH_STM32H7
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@@ -144,7 +154,7 @@ config HAVE_STM32_USBCANBUS
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bool
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depends on HAVE_STM32_USBFS || HAVE_STM32_USBOTG
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depends on HAVE_STM32_CANBUS || HAVE_STM32_FDCANBUS
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depends on !MACH_STM32F103
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depends on !MACH_STM32F1
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default y
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config MCU
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@@ -169,6 +179,7 @@ config MCU
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default "stm32h743xx" if MACH_STM32H743
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default "stm32h750xx" if MACH_STM32H750
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default "stm32l412xx" if MACH_STM32L412
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default "stm32f103xe" if MACH_N32G45x
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config CLOCK_FREQ
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int
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@@ -183,6 +194,8 @@ config CLOCK_FREQ
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default 150000000 if MACH_STM32G431
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default 400000000 if MACH_STM32H7 # 400Mhz is max Klipper currently supports
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default 80000000 if MACH_STM32L412
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default 64000000 if MACH_N32G45x && STM32_CLOCK_REF_INTERNAL
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default 128000000 if MACH_N32G45x
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config FLASH_SIZE
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hex
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@@ -195,6 +208,7 @@ config FLASH_SIZE
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default 0x20000 if MACH_STM32G0 || MACH_STM32G431
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default 0x20000 if MACH_STM32H750
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default 0x200000 if MACH_STM32H743
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default 0x20000 if MACH_N32G45x
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config FLASH_BOOT_ADDRESS
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hex
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@@ -219,6 +233,7 @@ config RAM_SIZE
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default 0x9000 if MACH_STM32G07x
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default 0x24000 if MACH_STM32G0Bx
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default 0x20000 if MACH_STM32H7
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default 0x10000 if MACH_N32G45x
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config STACK_SIZE
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int
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@@ -251,11 +266,11 @@ config STM32_DFU_ROM_ADDRESS
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choice
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prompt "Bootloader offset"
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config STM32_FLASH_START_2000
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bool "8KiB bootloader" if MACH_STM32F103 || MACH_STM32F070 || MACH_STM32G0 || MACH_STM32F0x2
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bool "8KiB bootloader" if MACH_STM32F1 || MACH_STM32F070 || MACH_STM32G0 || MACH_STM32F0x2
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config STM32_FLASH_START_5000
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bool "20KiB bootloader" if MACH_STM32F103
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config STM32_FLASH_START_7000
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bool "28KiB bootloader" if MACH_STM32F103
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bool "28KiB bootloader" if MACH_STM32F1
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config STM32_FLASH_START_8000
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bool "32KiB bootloader" if MACH_STM32F1 || MACH_STM32F2 || MACH_STM32F4
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config STM32_FLASH_START_8800
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@@ -6,6 +6,7 @@ CROSS_PREFIX=arm-none-eabi-
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dirs-y += src/stm32 src/generic lib/fast-hash
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dirs-$(CONFIG_MACH_STM32F0) += lib/stm32f0
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dirs-$(CONFIG_MACH_STM32F1) += lib/stm32f1
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dirs-$(CONFIG_MACH_N32G45x) += lib/n32g45x
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dirs-$(CONFIG_MACH_STM32F2) += lib/stm32f2
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dirs-$(CONFIG_MACH_STM32F4) += lib/stm32f4
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dirs-$(CONFIG_MACH_STM32G0) += lib/stm32g0
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@@ -17,7 +18,9 @@ MCU := $(shell echo $(CONFIG_MCU))
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MCU_UPPER := $(shell echo $(CONFIG_MCU) | tr a-z A-Z | tr X x)
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CFLAGS-$(CONFIG_MACH_STM32F0) += -mcpu=cortex-m0 -Ilib/stm32f0/include
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CFLAGS-$(CONFIG_MACH_STM32F1) += -mcpu=cortex-m3 -Ilib/stm32f1/include
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CFLAGS-$(CONFIG_MACH_STM32F103) += -mcpu=cortex-m3
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CFLAGS-$(CONFIG_MACH_N32G45x) += -mcpu=cortex-m4 -Ilib/n32g45x/include
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CFLAGS-$(CONFIG_MACH_STM32F1) += -Ilib/stm32f1/include
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CFLAGS-$(CONFIG_MACH_STM32F2) += -mcpu=cortex-m3 -Ilib/stm32f2/include
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CFLAGS-$(CONFIG_MACH_STM32F4) += -mcpu=cortex-m4 -Ilib/stm32f4/include
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CFLAGS-$(CONFIG_MACH_STM32G0) += -mcpu=cortex-m0plus -Ilib/stm32g0/include
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@@ -38,9 +41,11 @@ src-$(CONFIG_MACH_STM32F0) += ../lib/stm32f0/system_stm32f0xx.c
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src-$(CONFIG_MACH_STM32F0) += generic/timer_irq.c stm32/stm32f0_timer.c
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src-$(CONFIG_MACH_STM32F0) += stm32/stm32f0.c stm32/gpioperiph.c
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src-$(CONFIG_MACH_STM32F0) += stm32/stm32f0_adc.c stm32/stm32f0_i2c.c
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src-$(CONFIG_MACH_STM32F1) += ../lib/stm32f1/system_stm32f1xx.c
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src-$(CONFIG_MACH_STM32F1) += stm32/stm32f1.c generic/armcm_timer.c
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src-$(CONFIG_MACH_STM32F1) += stm32/adc.c stm32/i2c.c
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src-$(CONFIG_MACH_STM32F103) += ../lib/stm32f1/system_stm32f1xx.c
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src-$(CONFIG_MACH_STM32F103) += stm32/adc.c
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src-$(CONFIG_MACH_N32G45x) += ../lib/stm32f1/system_stm32f1xx.c
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src-$(CONFIG_MACH_N32G45x) += ../lib/n32g45x/n32g45x_adc.c stm32/n32g45x_adc.c
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src-$(CONFIG_MACH_STM32F1) += stm32/stm32f1.c generic/armcm_timer.c stm32/i2c.c
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src-$(CONFIG_MACH_STM32F2) += ../lib/stm32f2/system_stm32f2xx.c
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src-$(CONFIG_MACH_STM32F2) += stm32/stm32f4.c generic/armcm_timer.c
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src-$(CONFIG_MACH_STM32F2) += stm32/gpioperiph.c stm32/adc.c stm32/i2c.c
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@@ -20,7 +20,7 @@ struct gpio_pwm_info {
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};
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static const struct gpio_pwm_info pwm_regs[] = {
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#if CONFIG_MACH_STM32F103
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#if CONFIG_MACH_STM32F103 || CONFIG_MACH_N32G45x
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{TIM2, GPIO('A', 0), 1, GPIO_FUNCTION(2)},
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{TIM2, GPIO('A', 1), 2, GPIO_FUNCTION(2)},
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{TIM2, GPIO('A', 2), 3, GPIO_FUNCTION(2)},
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185
src/stm32/n32g45x_adc.c
Normal file
185
src/stm32/n32g45x_adc.c
Normal file
@@ -0,0 +1,185 @@
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// ADC functions on N32G45x
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//
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// Copyright (C) 2022-2023 Alexey Golyshin <stas2z@gmail.com>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "board/irq.h" // irq_save
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#include "board/misc.h" // timer_from_us
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#include "command.h" // shutdown
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#include "compiler.h" // ARRAY_SIZE
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#include "generic/armcm_timer.h" // udelay
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#include "gpio.h" // gpio_adc_setup
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#include "internal.h" // GPIO
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#include "sched.h" // sched_shutdown
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#include "n32g45x_adc.h" // ADC
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DECL_CONSTANT("ADC_MAX", 4095);
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#define ADC_TEMPERATURE_PIN 0xfe
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DECL_ENUMERATION("pin", "ADC_TEMPERATURE", ADC_TEMPERATURE_PIN);
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static const uint8_t adc_pins[] = {
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// ADC1
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0, GPIO('A', 0), GPIO('A', 1), GPIO('A', 6),
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GPIO('A', 3), GPIO('F', 4), 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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ADC_TEMPERATURE_PIN, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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// ADC2
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0, GPIO('A', 4), GPIO('A', 5), GPIO('B', 1),
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GPIO('A', 7), GPIO('C', 4), GPIO('C', 0), GPIO('C', 1),
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GPIO('C', 2), GPIO('C', 3), GPIO('F', 2), GPIO('A', 2),
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GPIO('C', 5), GPIO('B', 2), 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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#if CONFIG_MACH_N32G455 // ADC3/4 for G455 only
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// ADC3
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0, GPIO('B', 11), GPIO('E', 9), GPIO('E', 13),
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GPIO('E', 12), GPIO('B', 13), GPIO('E', 8), GPIO('D', 10),
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GPIO('D', 11), GPIO('D', 12), GPIO('D', 13), GPIO('D', 14),
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GPIO('B', 0), GPIO('E', 7), GPIO('E', 10), GPIO('E', 11),
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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// ADC4
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0, GPIO('E', 14), GPIO('E', 15), GPIO('B', 12),
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GPIO('B', 14), GPIO('B', 15), 0, 0,
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0, 0, 0, 0,
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GPIO('D', 8), GPIO('D', 9), 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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#endif
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};
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// Perform calibration
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static void
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adc_calibrate(ADC_Module *adc)
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{
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adc->CTRL2 = CTRL2_AD_ON_SET;
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while (!(adc->CTRL3 & ADC_FLAG_RDY))
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;
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adc->CTRL3 &= (~ADC_CTRL3_BPCAL_MSK);
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udelay(10);
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adc->CTRL2 = CTRL2_AD_ON_SET | CTRL2_CAL_SET;
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while (adc->CTRL2 & CTRL2_CAL_SET)
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;
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}
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struct gpio_adc
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gpio_adc_setup(uint32_t pin)
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{
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// Find pin in adc_pins table
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int chan;
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for (chan=0; ; chan++) {
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if (chan >= ARRAY_SIZE(adc_pins))
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shutdown("Not a valid ADC pin");
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if (adc_pins[chan] == pin)
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break;
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}
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// Determine which ADC block to use
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ADC_Module *adc;
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if ((chan >> 5) == 0)
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adc = NS_ADC1;
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if ((chan >> 5) == 1)
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adc = NS_ADC2;
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if ((chan >> 5) == 2)
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adc = NS_ADC3;
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if ((chan >> 5) == 3)
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adc = NS_ADC4;
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chan &= 0x1F;
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// Enable the ADC
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uint32_t reg_temp;
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reg_temp = ADC_RCC_AHBPCLKEN;
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reg_temp |= (RCC_AHB_PERIPH_ADC1 | RCC_AHB_PERIPH_ADC2 |
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RCC_AHB_PERIPH_ADC3 | RCC_AHB_PERIPH_ADC4);
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ADC_RCC_AHBPCLKEN = reg_temp;
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reg_temp = ADC_RCC_CFG2;
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reg_temp &= CFG2_ADCPLLPRES_RESET_MASK;
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reg_temp |= RCC_ADCPLLCLK_DIV1;
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reg_temp &= RCC_ADCPLLCLK_DISABLE;
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ADC_RCC_CFG2 = reg_temp;
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reg_temp = ADC_RCC_CFG2;
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reg_temp &= CFG2_ADCHPRES_RESET_MASK;
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reg_temp |= RCC_ADCHCLK_DIV16;
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ADC_RCC_CFG2 = reg_temp;
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ADC_InitType ADC_InitStructure;
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ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
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ADC_InitStructure.MultiChEn = 0;
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ADC_InitStructure.ContinueConvEn = 0;
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ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIGCONV_NONE;
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ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
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ADC_InitStructure.ChsNumber = 1;
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ADC_Init(adc, &ADC_InitStructure);
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adc_calibrate(adc);
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if (pin == ADC_TEMPERATURE_PIN) {
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NS_ADC1->CTRL2 |= CTRL2_TSVREFE_SET;
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VREF1P2_CTRL |= (1<<10);
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} else {
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gpio_peripheral(pin, GPIO_ANALOG, 0);
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}
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return (struct gpio_adc){ .adc = adc, .chan = chan };
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}
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// Try to sample a value. Returns zero if sample ready, otherwise
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// returns the number of clock ticks the caller should wait before
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// retrying this function.
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uint32_t
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gpio_adc_sample(struct gpio_adc g)
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{
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ADC_Module *adc = g.adc;
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uint32_t sr = adc->STS;
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if (sr & ADC_STS_STR) {
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if (!(sr & ADC_STS_ENDC) || adc->RSEQ3 != g.chan)
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// Conversion still in progress or busy on another channel
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goto need_delay;
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// Conversion ready
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return 0;
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}
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// ADC timing: clock=4Mhz, Tconv=12.5, Tsamp=41.5, total=13.500us
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ADC_ConfigRegularChannel(adc, g.chan, 1, ADC_SAMP_TIME_41CYCLES5);
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adc->CTRL2 |= CTRL2_AD_ON_SET;
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adc->CTRL2 |= CTRL2_EXT_TRIG_SWSTART_SET;
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need_delay:
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return timer_from_us(20);
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}
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// Read a value; use only after gpio_adc_sample() returns zero
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uint16_t
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gpio_adc_read(struct gpio_adc g)
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{
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ADC_Module *adc = g.adc;
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adc->STS &= ~ADC_STS_ENDC;
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adc->STS &= ~ADC_STS_STR;
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adc->CTRL2 &= CTRL2_EXT_TRIG_SWSTART_RESET;
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uint16_t result = adc->DAT;
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return result;
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}
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// Cancel a sample that may have been started with gpio_adc_sample()
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void
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gpio_adc_cancel_sample(struct gpio_adc g)
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{
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ADC_Module *adc = g.adc;
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irqstatus_t flag = irq_save();
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if (adc->STS & ADC_STS_STR)
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gpio_adc_read(g);
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irq_restore(flag);
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}
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@@ -15,7 +15,7 @@
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#include "internal.h" // GPIO
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#include "sched.h" // DECL_INIT
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#if CONFIG_MACH_STM32F103 || CONFIG_MACH_STM32G4
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#if CONFIG_MACH_STM32F103 || CONFIG_MACH_STM32G4 || CONFIG_MACH_N32G45x
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// Transfer memory is accessed with 32bits, but contains only 16bits of data
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typedef volatile uint32_t epmword_t;
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#define WSIZE 2
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