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icm20948: Formatting refactor

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Signed-off-by: Maksim Bolgov maksim8024@gmail.com
This commit is contained in:
MRX8024 2025-03-24 12:46:41 +02:00 committed by KevinOConnor
parent 869440a7ed
commit 81a1a03ed0
1 changed files with 24 additions and 29 deletions
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11
klippy/extras/icm20948.py
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@ -17,8 +17,7 @@ ICM20948_ADDR = 0x68
ICM_DEV_IDS = { ICM_DEV_IDS = {
0xEA: "icm-20948", 0xEA: "icm-20948",
#everything above are normal ICM IDs #everything above are normal ICM IDs
} }
# ICM20948 registers # ICM20948 registers
REG_DEVID = 0x00 # 0xEA REG_DEVID = 0x00 # 0xEA
@ -34,14 +33,13 @@ REG_BANK_SEL = 0x7F
SAMPLE_RATE_DIVS = { 4500: 0x00 } SAMPLE_RATE_DIVS = { 4500: 0x00 }
#SET_CONFIG = 0x01 # FIFO mode 'stream' style
SET_BANK_0 = 0x00 SET_BANK_0 = 0x00
SET_BANK_1 = 0x10 SET_BANK_1 = 0x10
SET_BANK_2 = 0x20 SET_BANK_2 = 0x20
SET_BANK_3 = 0x30 SET_BANK_3 = 0x30
SET_ACCEL_CONFIG = 0x06 # 16g full scale, 1209Hz BW, ??? delay 4.5kHz samp rate SET_ACCEL_CONFIG = 0x06 # 16g full scale, 1209Hz BW, 4.5kHz samp rate
SET_PWR_MGMT_1_WAKE = 0x01 SET_PWR_MGMT_1_WAKE = 0x01
SET_PWR_MGMT_1_SLEEP= 0x41 SET_PWR_MGMT_1_SLEEP = 0x41
SET_PWR_MGMT_2_ACCEL_ON = 0x07 SET_PWR_MGMT_2_ACCEL_ON = 0x07
SET_PWR_MGMT_2_OFF = 0x3F SET_PWR_MGMT_2_OFF = 0x3F
SET_USER_FIFO_RESET = 0x0E SET_USER_FIFO_RESET = 0x0E
@ -129,7 +127,6 @@ class ICM20948:
% (dev_id)) % (dev_id))
else: else:
logging.info("Found %s with id %x"% (ICM_DEV_IDS[dev_id], dev_id)) logging.info("Found %s with id %x"% (ICM_DEV_IDS[dev_id], dev_id))
# Setup chip in requested query rate # Setup chip in requested query rate
self.set_reg(REG_PWR_MGMT_1, SET_PWR_MGMT_1_WAKE) self.set_reg(REG_PWR_MGMT_1, SET_PWR_MGMT_1_WAKE)
self.set_reg(REG_PWR_MGMT_2, SET_PWR_MGMT_2_ACCEL_ON) self.set_reg(REG_PWR_MGMT_2, SET_PWR_MGMT_2_ACCEL_ON)
@ -137,7 +134,6 @@ class ICM20948:
self.read_reg(REG_DEVID) # Dummy read to ensure queues flushed self.read_reg(REG_DEVID) # Dummy read to ensure queues flushed
self.set_reg(REG_ACCEL_SMPLRT_DIV1, SAMPLE_RATE_DIVS[self.data_rate]) self.set_reg(REG_ACCEL_SMPLRT_DIV1, SAMPLE_RATE_DIVS[self.data_rate])
self.set_reg(REG_ACCEL_SMPLRT_DIV2, SAMPLE_RATE_DIVS[self.data_rate]) self.set_reg(REG_ACCEL_SMPLRT_DIV2, SAMPLE_RATE_DIVS[self.data_rate])
# self.set_reg(REG_CONFIG, SET_CONFIG) # No config register
self.set_reg(REG_BANK_SEL, SET_BANK_2) self.set_reg(REG_BANK_SEL, SET_BANK_2)
self.set_reg(REG_ACCEL_CONFIG, SET_ACCEL_CONFIG) self.set_reg(REG_ACCEL_CONFIG, SET_ACCEL_CONFIG)
self.set_reg(REG_BANK_SEL, SET_BANK_0) self.set_reg(REG_BANK_SEL, SET_BANK_0)
@ -146,7 +142,6 @@ class ICM20948:
self.set_reg(REG_USER_CTRL, SET_USER_FIFO_RESET) self.set_reg(REG_USER_CTRL, SET_USER_FIFO_RESET)
self.set_reg(REG_USER_CTRL, SET_USER_FIFO_EN) self.set_reg(REG_USER_CTRL, SET_USER_FIFO_EN)
self.read_reg(REG_INT_STATUS) # clear FIFO overflow flag self.read_reg(REG_INT_STATUS) # clear FIFO overflow flag
# Start bulk reading # Start bulk reading
rest_ticks = self.mcu.seconds_to_clock(4. / self.data_rate) rest_ticks = self.mcu.seconds_to_clock(4. / self.data_rate)
self.query_icm20948_cmd.send([self.oid, rest_ticks]) self.query_icm20948_cmd.send([self.oid, rest_ticks])